Patents Examined by James Demakis
  • Patent number: 7046491
    Abstract: The invention concerns a device for protecting an electric source adapted to power an electric member comprising a test unit (6) adapted to deliver a signal (8) representing the availability of the electric source (2), to a control unit (10). The unit (10) determines an operating mode of the electric member (4) wherein the power consumption of the electric member is a function of the availability signal (8) received from the test unit (6). The electric source (2) can power directly the electric member (4) and the control unit (10) can act on the electric member itself. The control unit (10) can also be interposed between the electric source (2) and the electric member (4) to modify at least one characteristic of the current powering the electric member.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: May 16, 2006
    Assignee: Valeo Climatisation
    Inventors: Olivier Colette, Benjamlin Frugier
  • Patent number: 6975496
    Abstract: A surge protection device is disclosed that includes a conductor for receiving an rf signal and a dc current, a first shield having a lumen configured to accommodate at least a portion of the conductor, and a second shield having a lumen configured to accommodate the first shield so that a portion of the first shield is positioned within the lumen of the second shield. The surge protection device further includes a dc blocking device, coupled to the conductor, for attenuating the dc current, a device, coupled to the conductor, for diverting the dc current to the second shield, and a dielectric disposed between the first shield and the second shield for preventing the dc current from traveling from the second shield to the first shield.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: December 13, 2005
    Assignee: PolyPhaser Corporation
    Inventors: Jonathan L. Jones, Richard C. Dunning, Mark J. Mattson
  • Patent number: 6965505
    Abstract: At a ship's magnetic silencing facility, calibration measurements are taken of onboard magnetic fields, and the off-board magnetic signature is minimized through an iterative degaussing process. Current data associated with the signature minimization is retained by a processor-controller implemented, along with degaussing coils and other apparatus, in a CLDG system effectuated onboard in a manner continually adaptive to changing conditions while voyaging. According to the CLDG methodology: Real time measurements are taken of the onboard magnetic fields, and are modified to account for the degaussing coils' magnetic effects. Via least squares fit mathematics, scale factors are calculated based on the relationship between (i) the real time measurements (as modified) of the onboard magnetic fields and (ii) the calibration measurements of the onboard magnetic fields.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: November 15, 2005
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Richard M. Mack, Robert A. Wingo
  • Patent number: 6944001
    Abstract: Resettable circuit interrupting devices, such as GFCI devices, that include an independent trip mechanism and a reset lockout mechanism are provided. The trip mechanism operates independently of a circuit interrupting mechanism used to break the connection, and the reset lockout mechanism prevents the resetting of electrical connections between input and output conductors if the circuit interrupting mechanism is non-operational or if an open neutral condition exists.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: September 13, 2005
    Assignee: Leviton Manufacturing Co., Inc.
    Inventors: William R. Ziegler, Nicholas L. DiSalvo
  • Patent number: 6934135
    Abstract: A disk drive is disclosed comprising a spindle motor for rotating a disk and a voice coil motor (VCM) for actuating a head over the disk. The spindle motor comprises a plurality of windings, and the VCM comprises a voice coil. If the current flowing from a supply voltage exceeds a threshold, the windings are disconnected from the supply voltage, the voice coil is disconnected from the supply voltage, and the first and second ends of the voice coil are connected to ground.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: August 23, 2005
    Assignee: Western Digital Technologies, Inc.
    Inventor: Robert P. Ryan
  • Patent number: 6920026
    Abstract: An ESD protection circuit with whole-chip ESD protection. A plurality of ESD protection devices, apart from an ESD detection circuit, can be MOS transistors connected between the input/output pads and the VDD/VSS lines or a power rail clamp circuit between the VDD and VSS lines. The ESD detection circuit is connected between the VDD and VSS lines. When an ESD event occurs and an ESD current is bypassed to the power line, the ESD detection circuit generates a plurality of enabling signals to simultaneously enable the ESD protection devices, which provides a plurality of discharge paths to bypass the ESD current.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: July 19, 2005
    Assignee: Industrial Technology Research Institute
    Inventors: Zi-Ping Chen, Chyh-Yih Chang, Ming-Dou Ker
  • Patent number: 6917501
    Abstract: An apparatus and method for providing electrostatic discharge protection. An exemplary micro tube spark gap type electrostatic discharge protection device comprises first and second separated spark electrodes hat form a spark gap therebetween. A high frequency noncoupled starter circuit is provided that comprises first and second high voltage electrodes disposed adjacent to the spark gap, and coupled to a high frequency voltage source. The high frequency voltage source generates a high frequency voltage that passes from the high voltage electrodes through the spark gap. The high frequency voltage (electric field) supplied by the voltage source falls just short of ionizing the gap, but provides energy to start a discharge. Once ionization occurs, the high frequency voltage is shut off, allowing for maximal energy loss. This results in a voltage versus time characteristic having a decreased ionization voltage and an increased power loss level after the high frequency voltage shuts off.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: July 12, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Daniel J. Byrne, Arnol S. Pandit, Mark N. Robins
  • Patent number: 6885532
    Abstract: A current detection circuit applicable to a switching circuit using switching transistors to supply a prescribed load current to a load, comprises a sample-hold capacitor for temporarily holding a terminal voltage of the switching transistor that is turned on, and a switch that is inserted between the switching transistor and sample-hold capacitor and is controlled to be turned on in synchronization with the ON-timing of the switching transistor, wherein charged voltage of the sample-hold capacitor is detected as a detection voltage. An overcurrent detection circuit is constituted in such a way that the switching transistor is compulsorily turned off when the detection voltage exceeds reference voltage. The switching circuit may correspond to a pulse-width modulation (PWM) amplifier using a pair of a PMOS transistor and an NMOS transistor that are alternately turned on or off.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: April 26, 2005
    Assignee: Yamaha Corporation
    Inventor: Masao Noro
  • Patent number: 6879479
    Abstract: An apparatus for sensing and measuring the HV surge arrester current includes two toroidal current transformers arranged coaxially with respect to the earth wire of the surge arrester, elements for sensing the current signals emitted by the transformers and for converting the current signals in digital signals, and elements for transmitting the digital signals to an information network and analog state signals by relay activation. The two toroidal current instrument transformers are associated, respectively, one to elements for sensing the normal leakage current, and the other to elements for sensing the impulsive current, the latter comprising a circuit (TRIGGER) discriminating between “switching” and “lightning” signals, in which the basis for discrimination is a signal duration threshold, of about 35 ?s.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: April 12, 2005
    Assignees: CESI Centro Elettrotecnico Sperimentale Italiano Giacinto Motta S.p.A., Microelettrica Scientifica S.p.A., T.E.R.NA. Trasmissione Elettricita Rete Nazionale S.p.A.
    Inventors: Enrico Colombo, Filippo Jaselli, Evaristo Di Bartolomeo
  • Patent number: 6876528
    Abstract: A fault detector sensor includes a current transformer, with two multi-turn windings each formed around a portion of the core, with one winding adjacent to each of the hot and neutral wires of the power line being protected. Both windings are connected in series in a way which reinforces arc fault noise generated by arc faults involving the line and neutral, but which causes signal reduction for noise signals from the line and neutral, or either, to ground. The windings and core are selected to self resonate at a frequency that excludes power line carrier frequencies but which includes arc fault frequencies. The core optionally has a third winding, forming a grounded neutral transformer, or ground fault detector. Instead of a third winding, one of the arc fault sensing windings can act as a dual function sensor.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: April 5, 2005
    Assignee: Passi Seymour, Inc.
    Inventor: Bruce F. Macbeth
  • Patent number: 6853528
    Abstract: The present invention combines sensor portions 22,23 of the device for measuring either current flowing through the line from the power inlet to the power outlet or voltage, or both, and bushings 150, 160 installed at either the power inlet or the power outlet, or both, so as to reduce the size of the gas insulating apparatus. Specifically, the above-mentioned sensor portions 22,23 are installed in the space inside the porcelain tube 15 that constitutes the bushings 150, 160. As this space, it is preferable to use the space on the outer-periphery side of the electric field relaxation member 21 provided inside the porcelain tube 15.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: February 8, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuro Kato, Tomoaki Utsumi, Fumihiro Endo, Kazuo Kobayashi, Kazuhiro Saito
  • Patent number: 6850403
    Abstract: Apparatus and method for generating and controlling flows of positive and negative air ions includes interposing isolated sets of electrodes in a flowing air stream to separately produce positive and negative ions. The rates of separated production of positive and negative ions are sensed to control ionizing voltages applied to electrodes that produce the ions. Variations from a balance condition of substantially equal amounts of positive and negative ions flowing in the air stream are also sensed to alter bias voltage applied to a grid electrode through which the air stream and ions flow.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: February 1, 2005
    Assignee: Ion Systems, Inc.
    Inventors: Peter Gefter, Alexander Ignatenko, Gopalan Vijaykumar, Aleksey Klochkov
  • Patent number: 6807039
    Abstract: A junction field effect transistor (JFET), acting as a switch, is coupled between the source and gate of a metal oxide semiconductor field effect transistor (MOSFET). A capacitor is connected in parallel with the MOSFET's “Miller capacitance” by being coupled between the gate and drain of the MOSFET in series with a current limiting resistor. When the JFET is on, it has a low impedance with zero gate voltage and forces the gate to source voltage of the MOSFET to remain near zero and, thus, the MOSFET in a high impedance state, until the capacitor charges to the supply voltage.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: October 19, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventor: Joel F. Priest
  • Patent number: 6795283
    Abstract: A combination electricals package (12, 32) particularly for use with fractional horsepower compressor motors for various appliances has a first recess formed in the package for receipt of a motor starter (14) and a second recess formed in the package for receipt of a run capacitor (16) potted therein and having capacitor leads (16a) connected to a capacitor lead connecting portion (20e, 20e′) of a connector (20, 20′) also having a motor pin connecting portion (20d) and a motor starter connecting portion (20b). The capacitor lead connecting portion in a preferred embodiment includes spaced apart parallel extending rails to accommodate capacitor lead misalignment. In a modified embodiment the capacitor lead connecting portion includes quick connect receptacles for conventional capacitor quick connect terminals. The connectors are formed so that the same connector can be used in two opposite orientations for left and right connectors.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: September 21, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Richard J. Lisauskas, William R. LeBeau, Russell P. Brodeur
  • Patent number: 6781812
    Abstract: A chuck equipment which can hold insulating substrates is provided. First and second electrodes are provided to be exposed on the base the surface of which is insulated. The insulating substrate is placed in contact with or in close proximity to the surfaces of the first and second electrodes. Since an electric field having a high rate of spatial change is established between the first and second electrodes, the substrate is held against the surface of the chuck equipment by the gradient force. Since the magnitude of the gradient force depends on that of the rate of change of the electric field, a voltage may be applied between the first and second electrodes to establish an electric field of 1.0×106V/m or greater.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: August 24, 2004
    Assignee: Nihon Shinku Gijutsu Kabushiki Kaisha
    Inventors: Koh Fuwa, Ken Maehira
  • Patent number: 6765773
    Abstract: The invention relates to an arrangement for improving the ESD protection in an integrated circuit. In order to achieve an effective use of chip area, it is proposed to connect a passive component between the bonding pad and an integrated circuit, said passive component being arranged over an electrically non-conductive layer and under the bonding pad. In the event of damage to the bonding pad when bonding or testing, only the passive component, at most, is short-circuited, but the functionality of the output driver stage and of the integrated circuit remains unaffected.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: July 20, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Joachim Christian Reiner
  • Patent number: 6760207
    Abstract: A compressor terminal fault interruption method and interrupter for disconnecting power to a compressor terminal when terminal venting failure is imminent including a current sensing circuit for sensing current provided to the terminal by a power source and outputting a sensed signal representing the current provided to the terminal and a control circuit. The control circuit includes a first circuit for outputting a reference signal representing input current much higher than locked rotor current, a second circuit connected to the current sensing circuit and the first circuit for comparing the sensed signal to the reference signal, and a third circuit connected to the second circuit for disconnecting power to the terminal when the sensed signal exceeds the reference signal, thereby preventing excessive current from reaching the compressor terminal.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: July 6, 2004
    Assignee: Tecumseh Products Company
    Inventors: Arnold G. Wyatt, Alex Alvey
  • Patent number: 6757150
    Abstract: A method of facilitating the transfer of ions from at least one ionizing pin disposed in an ion air blower into an air stream while the ion air blower is activated. The method includes attaching a baffle to the ion air blower; and positioning the baffle upstream from and proximate to the at least one ionizing pin to cause turbulent flow in the air stream proximate to the tip of the at least one ionizing pin. An ion air blower is also detailed herein. The air blower includes an emitter assembly disposed in a housing. A plurality of ionizing pins extend from the emitter assembly such that the air stream passes over the plurality of ionizing pins. A baffle is disposed proximate to and upstream from the ionizing pins to create turbulent flow in the air stream proximate to a tip of each of the ionizing pins.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: June 29, 2004
    Assignee: Illinois Tool Works Inc.
    Inventors: John Gorczyca, Michael Jacobs
  • Patent number: 6738245
    Abstract: An improved series-pass over-voltage protection circuit including multiple parallel-connected series-pass over-voltage suppression transistors coupling a DC voltage supply such as a motor vehicle storage battery to one or more high current electrical loads. During normal operation, all of the transistors are biased to the fully conductive/enhanced state to provide very low pass-through on-resistance. However, during linear (over-voltage suppression) operation, a logic circuit enables individual transistors in sequence at a frequency that is high relative to the thermal time constant of the transistors, and with a small amount of conduction overlap between successively enabled transistors. Sequentially enabling the transistors guarantees at least a minimum level of load sharing, and the overlap minimizes switching-related output current transients.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: May 18, 2004
    Assignee: Delphi Technologies, Inc.
    Inventor: Jeffrey A. Ely
  • Patent number: 6700765
    Abstract: An improved series-pass over-voltage protection circuit includes at least one N-channel enhancement mode MOSFET (NFET) coupling a DC voltage supply such as a motor vehicle storage battery to one or more high current electrical loads. The drain of the NFET is connected to the positive terminal of the DC voltage supply, and a high impedance gate voltage power supply biases the NFET to a fully enhanced state in normal operation to provide very low pass-through on-resistance.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: March 2, 2004
    Assignee: Delphi Technologies, Inc.
    Inventor: Jeffrey A. Ely