Abstract: A circuit includes a high-side transistor pair and a low-side transistor pair having a common intermediate node. The high-side transistor pair includes a first transistor having a control node and a current flowpath therethrough configured to provide a current flow line between a supply voltage node and the intermediate node, and a second transistor having a current flowpath therethrough coupled to the control node of the first transistor. The low-side transistor pair includes a third transistor having a control node and a current flowpath therethrough configured to provide a current flow line between the intermediate node and the reference voltage node, and a fourth transistor having a current flowpath therethrough coupled to the control node of the third transistor. Testing circuitry is configured to be coupled to at least one of the second transistor and the fourth transistor to apply thereto a test-mode signal.

Abstract: Aspects of the present disclosure control aging of a signal path in an idle mode to mitigate aging. In one example, an input of the signal path is alternately parked low and high over multiple idle periods to balance the aging of devices (e.g., transistors) in the signal path. In another example, a clock signal (e.g., a clock signal with a low frequency) is input to the signal path during idle periods to balance the aging of devices (e.g., transistors) in the signal path. In another example, the input of the signal path is parked high or low during each idle period based on an aging pattern.

Abstract: A semiconductor device includes a magnetic switch provided on a semiconductor substrate. The magnetic switch includes: a Hall element, first and second power supply terminals; a current source driving the Hall element; a switch circuit switching a differential output voltage supplied from two electrodes of the Hall element to a first or second state based on a control signal supplied from a control terminal; an amplifier amplifying a signal from the switch circuit; a reference voltage circuit generating a reference voltage based on a reference common mode voltage and a control signal; a comparator receiving an output signal of the amplifier and the reference voltage; and a latch circuit latching an output voltage of the comparator. The reference voltage of the reference voltage circuit is controlled by switching from a reference value to a voltage with a high or low adjustment value according to the output voltage of the comparator.

Abstract: An apparatus for reducing a temperature influence in measuring a switching current based on stray inductance. The apparatus includes a current detector configured to output a voltage derived from a differential component of a current so as to detect a switching current of a power module, a filter configured to filter the voltage output from the current detector, an integrator configured to integrate a voltage output from the filter, an ADC configured to convert an analog voltage output from the integrator into a digital voltage and sample the digital voltage, a scaler configured to convert a sampled integrator output value output from the ADC into a scaled current value, and a compensator configured to remove a temperature dependent DCR effect from the scaled current value.

Abstract: A system comprises a positive voltage supply node and a negative voltage supply node configured for connection to a load, a power source coupled between the positive voltage supply node and the negative voltage supply node, an energy storage device, a solid-state switch, and a control system. The energy storage device and the solid-state switch are connected in series between the positive voltage supply node and the negative voltage supply node. The control system is configured to control activation and deactivation of the solid-state switch to (i) allow the energy storage device to be discharged and supply power to a load, and to (ii) modulate an amount of charging current that flows through the energy storage device from the power source (or load) to recharge the energy storage device.

Abstract: An actuator device with an actuator cup having a first end and a second end. The actuator cup defines a storage chamber containing a pyrotechnic material to produce gas. The storage chamber also includes a coolant. At least one electrical connection coupled to the first end, the electrical connection in reaction initiating communication with the pyrotechnic material. The second end of the actuator cup includes a concave surface before actuation of the pyrotechnic material and during the actuation of the pyrotechnic material the second end transitions from the concave surface to a convex surface.

Abstract: This disclosure includes novel ways of implementing a power supply that powers a load. A main battery source produces a main battery voltage; each of multiple auxiliary battery sources in a set produces a respective auxiliary battery voltage. A controller initially sets a battery supply voltage to the main battery voltage, the main battery voltage is supplied to a power converter. The controller then monitors a magnitude of the battery supply voltage and adjusts the battery supply voltage supplied to the power converter based on a comparison of the magnitude of the battery supply voltage with respect to a threshold level. The adjusted battery supply voltage is provided from a serial connection of the main battery source and a first auxiliary battery source in the set.

Abstract: A semiconductor device of the present invention includes: a P-type output transistor configured to have a source to which a power supply voltage is applied, and a drain connected to an external connection pad; a gate wiring configured to be connected to a gate of the output transistor; a signal transmitting portion configured to transmit an input signal to the gate wiring; and a voltage-breakdown protecting portion configured to apply the power supply voltage to a back gate of the output transistor if a voltage on the external connection pad is equal to or lower than the power supply voltage, or the voltage-breakdown protecting portion bringing the signal transmitting portion into a disconnection state and applies the voltage on the external connection pad to the gate and the back gate of the output transistor if the voltage applied on the external connection pad is higher than the power supply voltage.

Abstract: A circuit device includes a first power supply line to which a first power supply voltage is supplied, a second power supply line to which a second power supply voltage is supplied, a third power supply line, a power supply circuit, a predetermined circuit, a first power-on reset circuit, a second power-on reset circuit, and a reset control circuit. When a first power-on reset signal and a second power-on reset signal become a reset release level, the reset control circuit sets a third power-on reset signal output to at least a part of the predetermined circuit to a reset release level.

Abstract: A multiplication injection locked oscillator (MIILO) circuitry includes a ring injection locked oscillator (ILO) circuitry that outputs clock signals, a first switching circuitry and a second switching circuitry. The ring ILO circuitry includes a first path having first delay stages, and a second path having a second delay stages. The first switching circuitry is connected to the first path and a voltage supply node. The first switching circuitry receives a first control signal and a second control signal and selectively connects the voltage supply node to the first path. The second switching circuitry is connected to the second path and a reference voltage node. The second switching circuitry receives the first control signal and the second control signal and selectively connects the reference voltage node to the second path.

Abstract: A real-time clock device includes a package that houses a resonator, an oscillation circuit, a clocking circuit, and a functional circuit, and on which external terminals are formed.

Abstract: An electromagnetic interference regulator by use of capacitive parameters of the field-effect transistor for detecting the induced voltage and the induced current of the field-effect transistor to determine whether the operating frequency of the field-effect transistor is within the preset special management frequency of electromagnetic interference. When the basic frequency and the multiplied frequency exceed the limit, the content of the external capacitor unit can be adjusted to assist the products using field-effect transistors to maintain excellent electromagnetic interference adjustment capabilities under various loads, thereby optimizing the characteristics of electromagnetic interference.

Abstract: A system is described. The system includes a control transistor, a voltage source, a feedback node connected between a drain of the control transistor and the voltage source, a plurality of resistors connected between the voltage source and ground, and a control node connected to a gate of the control transistor. The resistors include a first series-connected set of resistors associated with the control transistor being biased and a second series-connected set of resistors associated with the control transistor being unbiased. During a startup period, the control node is configured to bias the control transistor to select the first series-connected set of resistors, thereby increasing a voltage level of the voltage source to a boosted VCC voltage. After the startup period, the control node is configured to unbias the control transistor to select the second series-connected set of resistors, thereby decreasing the boosted VCC voltage to a normal VCC voltage.

Abstract: A data receiving circuit is provided. The data receiving circuit includes a first transistor, a second transistor, a third transistor, and a latch circuit. The first transistor has a gate configured to receive an input signal. The latch circuit is configured to output an output signal in response to the input signal. The second transistor has a gate configured to receive a first signal and a drain connected to the latch circuit. The third transistor has a gate configured to receive the first signal and a drain connected to the latch circuit. The second transistor and the third transistor are configured to provide a current to the latch circuit in response to the first signal.

Abstract: An electric power supply is disclosed having high-voltage, direct-current (HVDC) circuitry comprising one or more DC pre-charge capacitors and one or more power transistor switches, the HVDC circuitry configured to receive high-voltage, direct-current (HVDC) input power of about 320 volts and/or greater and convert the HVDC input power to multi-phase, high-voltage, alternating-current (HVAC) output power of about 320 volts and/or greater; and low-voltage, direct current (LVDC) circuitry adapted and configured to operate on low-voltage, direct-current, wherein the LVDC circuitry is configured to control and monitor the multi-phase HVAC output power. The electric power supply is further configured to operate in reverse and convert received multiphase HVAC input power to HVDC output power.

Abstract: According to an embodiment, a synapse circuit includes: a buffer that changes an output signal to a second logical value at a timing when an input signal exceeds a first threshold level, in a case where the output signal has a first logical value in a first mode, and changes the output signal to the second logical value at a timing when the input signal exceeds a reference level lower than the first threshold level, in a case where the output signal has the first logical value in a second mode; an adjusting unit that adjusts the first threshold level depending on a stored coefficient; and a mode switching unit that operates the buffer in the first mode during a period in which an acquired spike is not generated, and operates the buffer in the second mode during a period in which the spike is generated.