Abstract: Provided are phase tracking reference signal (PTRS) configuration, determination and information feedback methods and devices. The PTRS configuration method includes: transmitting, by a first node, the control information to a second node, where the control information is used for indicating a configuration parameter of the PTRS to the second node and the PTRS is transmitted by the first node or the second node. The second node determines the configuration parameter of the PTRS through the control information transmitted by the first node and/or an agreed implicit rule. A third node transmits control information to a fourth node, where the control information is used for feeding received power or quality information of the PTRS back to the fourth node.

Abstract: A communication control device that includes a synchronization detection unit that detects a synchronization timing from a synchronization signal and a transmission control unit that causes a communication unit to transmit a control signal., for changing a communication route of data to which a flag specified on the basis of the synchronization signal, to a network switch that performs relay between a reception device and a plurality of transmission devices that transmits the data to which the flag is added while changing the flag at the synchronization timing.

Abstract: A method for controlling a transmit power of a terminal, and a terminal, where the method and the terminal include, working states of a first antenna and a second antenna may be monitored, and then a transmit power of the first antenna or that of the second antenna may be controlled according to a preset correspondence. Therefore, according to the method and the terminal, a transmit power of an antenna in a working state in the first antenna and the second antenna may be accurately controlled. If the transmit power is less than a standard transmit power, a Specific Absorption Rate (SAR) can be reduced.

Abstract: A controller area network receiver includes a measurement circuit, a filter circuit, and a frame detection circuit. The measurement circuit is coupled to a bit stream input terminal, and includes a timer circuit and error calculation circuitry. The timer circuit is coupled to the bit stream input terminal and a reference clock generator circuit. The error calculation circuitry is coupled to the timer circuit. The filter circuit is coupled to the measurement circuit, and includes error clipping control circuitry and clock period adjustment circuitry. The error clipping control circuitry is coupled to the error calculation circuitry. The clock period adjustment circuitry is coupled to the error calculation circuitry and the timer circuit. The frame detection circuit is coupled to the filter circuit and the bit stream input terminal.

Abstract: Generating, during a first and second signaling interval, an aggregated data signal by forming a linear combination of wire signals received in parallel from wires of a multi-wire bus, wherein at least some of the wire signals undergo a signal level transition during the first and second signaling interval; measuring a signal skew characteristic of the aggregated data signal; and, generating wire-specific skew offset metrics, each wire-specific skew offset metric based on the signal skew characteristic.

Abstract: LED drive control circuitry according to one embodiment outputs an LED drive control signal serving as driving a light emitting diode included in a photocoupler that performs insulation communication in synchronization with a reference clock signal. The LED drive control circuit includes a duty cycle changer that changes a duty cycle of the LED drive control signal in accordance with the reference clock signal and a signal synchronized with the reference clock signal.

Abstract: A digital isolator provided includes a pair of transceiver circuits and a control circuit. Each transceiver circuit includes a transmitter circuit, a receiver circuit, and a DC isolation circuit. When the control circuit controls one of the pair of transceiver circuits to operate in a transmitting mode and the other of the pair of transceiver circuits to operate in a receiving mode, the transmitting circuit of the transceiver circuit operating in the transmitting mode receives a square wave signal to generate a pair of differential square wave signals, the connected DC isolation circuits receive the pair of differential square wave signals to generate a pair of differential coupling signals, and the transceiver circuit operating in the receiving mode uses the pair of differential coupling signals to output the square wave signal through the design of a pair of feedback voltage divider circuits and a differential comparison circuit included therein.

Abstract: A data receiver circuit includes a summer circuit configured to receive an input signal that encodes multiple data symbols, and combine the input signal with a feedback signal to generate an equalized input signal, which is used to generate a clock signal. The data receiver circuit also includes multiple data slicer circuits that sample, using the clock signal and multiple voltage offsets, to generate multiple samples for a particular data symbol. A precursor compensation circuit included in the data receiver circuit may generate an output value for the particular data symbol using the multiple samples. The data receiver circuit also includes a post cursor compensation circuit that generates the feedback signal using at least one of the multiple samples and a value of a previously received sample.

Abstract: A wireless transmit/receive unit (WTRU) configured to perform wireless communications in higher frequency bands (e.g., above 6 GHz) using a fallback scheme is provided. The WTRU includes a receiver configured to receive, in a time transmission interval (TTI), at least one control signal and a first data signal using a first beam associated with a first beam identifier (ID) and a second data signal, subsequent to the first data signal, using a second beam associated with a second beam ID different from the first beam ID, such that one of the at least one control signal indicates the second beam ID; and a processor configured to switch a receive beam of the receiver from the first beam to the second beam based on the second beam ID to receive the second data signal.

Abstract: In some examples, a controller includes an interface to receive presence indicators associated with computer nodes, and a processor to determine, based on the presence indicators, a quantity of a set of computer nodes that are present in a system, and adjust, based on the determined quantity, phases of activity control indications provided to the computer nodes of the set of computer nodes, wherein the adjusting is to vary a first phase of a first activity control indication of the activity control indications relative to a second phase of a second activity control indication of the activity control indications.

Abstract: A wide-band antenna multiplexing method and device of an unmanned aerial vehicle (UAV) are disclosed. The method comprises: by a wide-band antenna, receiving an external signal and sending the received external signal to a first power divider; by the first power divider, dividing the external signal received from the wide-band antenna into multi-way sub-signals, and sending each sub-signal respectively to a receiving filter of a plurality of receiving filters, each of which is connected to the first power divider and corresponds to a functional modules of the UAV respectively; and by each respective receiving filter, performing filtering processing on the received sub-signal, obtaining a signal corresponding to the working frequency band of each respective functional module of the UAV, and sending the signal corresponding to the working frequency band of each respective functional module of the UAV to a corresponding functional module.

Abstract: A receiver circuit includes an equalizer configured to generate an equalization signal by equalizing an input data signal transferred through a communication channel based on an equalization coefficient; a clock data recovery circuit configured to generate a data clock signal and an edge clock signal based on the equalization signal, generate a data sample signal including a plurality of data bits by sampling the equalization signal in synchronization with the data clock signal, and generate an edge sample signal including a plurality of edge bits by sampling the equalization signal in synchronization with the edge clock signal; and an equalization control circuit configured to control the equalization coefficient by comparing the plurality of data bits and the plurality of edge bits.

Abstract: An apparatus and method for broadcast signal frame using a bootstrap and a preamble are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal.

Abstract: Provided are a memory device and a memory system including the same. The memory device may include a data bus inversion (DBI) mode selector configured to select a first multi-bit DBI signal from among a plurality of multi-bit DBI signals respectively corresponding to a plurality of DBI modes according to multi-bit data; a multi-mode DBI encoder configured to generate encoded multi-bit data by DBI encoding the multi-bit data according to the first multi-bit DBI signal; and a transceiver configured to transmit a data symbol corresponding to the encoded multi-bit data through a data channel and transmit a DBI symbol corresponding to the first multi-bit DBI signal through a DBI channel.

Abstract: An apparatus for estimating a DOA in a MIMO system includes a receiver and a signal processor. The receiver receives Rx signals from a target through Rx antennas after Tx signals having different phases are transmitted through Tx antennas, and transforms the Rx signals into time domain Rx signals. The processor transforms the time domain Rx signals into Rx signals in a frequency domain including a range-related domain and a velocity-related doppler domain; divides the doppler domain into regions according to a phase difference between the Tx signals; extracts signals from the regions; combines the signals to form first and second arrays; determines a minimum value for each of the first and second arrays using a DML algorithm; selects one of the first and second arrays having the minimum value as a true array; and estimates a DOA corresponding to the true array as an actual DOA of the target.

Abstract: Embodiments of this application provide a clock phase recovery apparatus and method, and a chip. The clock phase recovery apparatus includes an ADC, a dispersion compensation unit, a digital interpolator, a MIMO equalization unit, and a clock offset phase obtaining unit. The ADC is connected to the dispersion compensation unit, and the dispersion compensation unit is connected to a first input end of the digital interpolator. An output end of the digital interpolator is connected to an input end of the MIMO equalization unit, and an output end of the MIMO equalization unit is connected to an input end of the clock offset phase obtaining unit. The digital interpolator is configured to adjust, based on first offset phase information output by the clock offset phase obtaining unit, a dispersion-compensated signal output by the dispersion compensation unit.

Abstract: Embodiments of communications devices and methods for operating a communications device are described. In an embodiment, a communications device includes a complex multiplier configured to multiply a first input complex signal with a second input complex signal to generate an output complex signal, an amplifier configured to amplify an imaginary part of the output complex signal to generate an amplification result, a delay element configured to delay a rotation angle signal that is related to the second input complex signal, and a subtractor configured to subtract the amplification result from the delayed rotation angle signal to generate the rotation angle signal. Other embodiments are also described.

Abstract: A technique for transmitting data from a passive radio device (100) is described. As to a method aspect of the technique, an antenna (102) of the passive radio device (100) is exposed to an incident radio signal (502). A frequency domain representation of the incident radio signal (502) comprised at least one muted gap between active subcarriers within a bandwidth of the incident radio signal (502). The incident radio signal (502) is backscattered from the antenna by modulating an impedance of the antenna according to the data using at least two different modulation frequencies that differ by less than the bandwidth.

Abstract: A radio frequency module has a substrate, a first chip inductor, an integrated circuit, and a first amplifier connected to the first chip inductor. The first chip inductor is on a first main surface of the substrate and the integrated circuit is on a second main surface of the substrate, the second main surface being opposite the first main surface. The integrated circuit includes the first amplifier. When the substrate is viewed from a direction perpendicular to the first main surface of the substrate, the first chip inductor at least partially overlaps the integrated circuit.

Abstract: The described technology is generally directed towards multidimensional grid sampling for radio frequency power feedback. A mobile device can sample radio frequency signal power at multiple sample points, and can send sample values to a base station. The multiple sample points can be defined with reference to a grid having a first dimension and a second dimension, such as time and frequency, or delay and Doppler. A variety of techniques are provided to define the multiple sample points.