Patents Examined by Jane W Benner
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Patent number: 12360704Abstract: Techniques manage data within storage equipment having a Flexible Data Placement (FDP) drive. The techniques involve configuring the storage equipment to support storing data in reclaim units of the FDP drive according to an initial group of reclaim unit handles. The techniques further involve detecting that a number of currently available reclaim units of the FDP drive has fallen below a first predefined threshold. The techniques further involve, in response to detecting that the number of currently available reclaim units of the FDP drive has fallen below the first predefined threshold, reconfiguring the storage equipment to support storing data in reclaim units of the FDP drive according to a smaller group of reclaim unit handles. The smaller group of reclaim unit handles has fewer reclaim unit handles than the initial group of reclaim unit handles.Type: GrantFiled: January 16, 2024Date of Patent: July 15, 2025Assignee: Dell Products L.P.Inventors: Amitai Alkalay, Vamsi K. Vankamamidi, Lior Kamran, Steven A. Morley
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Patent number: 12360668Abstract: A memory management method for continuously recording digital content and a circuit system operating the method are provided. The circuit system includes a control circuit, a memory, and a storage device. The memory has a buffer that is defined as a pre-buffer or a main buffer based on a current recording mode. In the method, the circuit system loads continuously-received data and sequentially saves the data in the buffer that is defined as the pre-buffer in a first-in-first-out manner before a start-record instruction is received. After the start-record instruction is received, the data buffered in the pre-buffer is combined with the data that is continuously recorded to the main buffer. This file is then written to the storage device until a stop-record instruction is received.Type: GrantFiled: October 11, 2023Date of Patent: July 15, 2025Assignee: Getac Technology CorporationInventors: Yu-Cheng Lee, Hsien-Yang Chiang
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Patent number: 12360889Abstract: A method and controller for operating a memory system in communication with a host. The method and controller logically arrange a sequence of reclaim sub-groups within a memory device. The method and controller process the reclaim sub-groups according to the sequence to control the memory device to perform garbage collection on the reclaim sub-groups in the memory device. In the sequence, the reclaim sub-groups are processed during the garbage collection such that at least one re-ordered data sequence in the sequence of the reclaim sub-groups being processed has re-ordered valid data that is not clumped.Type: GrantFiled: March 2, 2023Date of Patent: July 15, 2025Assignee: SK hynix NAND Product Solutions Corp.Inventors: David J. Pelster, Mark Golez, Daniel R. McLeran, Nathan Koch, Paul Ruby
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Patent number: 12353754Abstract: Methods, systems, and devices for techniques for enhanced read performance on blocks of memory cells are described. The method may involve selecting a first block of memory cells from a set of blocks of memory cells of a memory system based on a condition of the first block of memory cells being met and setting one or more programming parameters corresponding to the first block of memory cells such that the one or more programming parameters are within a threshold value of one or more programming parameters corresponding to a second block associated with a storage density different from a storage density of the first block of memory cells. Further, the method may involve performing an operation on the block of memory cells according to the one or more programming parameters.Type: GrantFiled: April 17, 2024Date of Patent: July 8, 2025Assignee: Micron Technology, Inc.Inventors: Chiara Cerafogli, Carla L. Christensen, Iolanda Del Villano, Lalla Fatima Drissi, Anna Scalesse, Maddalena Calzolari
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Patent number: 12333182Abstract: According to an example of the present disclosure, a system is provided. A system may include a main memory including a dynamic memory cell electrically coupled to a bitline and a word line, and a memory controller configured to selectively omit a restore operation during a read operation of the dynamic memory cell.Type: GrantFiled: March 12, 2024Date of Patent: June 17, 2025Assignee: DEEPX CO., LTD.Inventor: Lok Won Kim
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Patent number: 12333169Abstract: Provided is a memory system including a host system including a memory controller configured to control a read or write operation for a plurality of memory ranks, based on target or non-target information for the plurality of memory ranks, and a memory device including a storage configured to store on-die termination (ODT) information of the memory ranks. Here, the memory controller is further configured to determine a target rank to be read or written, and transmit information about the determined target rank, to the memory device, and the memory device is further configured to perform a comparison of the ODT information of the memory ranks stored in the storage with target or non-target information received from the memory controller, and change an ODT value of the target rank, based on target information received from the memory controller based on a result of the comparison.Type: GrantFiled: April 21, 2023Date of Patent: June 17, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Youngdo Um, Taeyoung Oh, Hoseok Seol
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Patent number: 12327018Abstract: A method may include receiving, at a storage device, an input and/or output (I/O) request comprising a device indication performing a determination, at the storage device, that the device indication indicates the storage device, and servicing, by the storage device, the I/O request based on the determination. The device indication may include an address for the I/O request. The method may include installing a second storage device in the storage system. The second storage device may be installed seamlessly. The first and second storage devices may be peer devices. The method may further including receiving, at the first storage device, a second I/O request including a second device indication, performing a second determination, by the first storage device, that the second device indication indicates the second storage device, and forwarding, by the first storage device, the second I/O request to the second storage device based on the second determination.Type: GrantFiled: February 4, 2022Date of Patent: June 10, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Veronica Lagrange Moutinho Dos Reis, Vishwanath Maram, Matthew Bryson, Gayathri Venkataraman
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Patent number: 12314601Abstract: A storage device may be coupled to a host device and the storage device may support a host performance booster (HPB) feature. A controller on the storage device may execute a background relocation operation. During the background relocation operation, the controller may identify a block to relocate data from. The controller may also determine that a relocation system threshold has not been reached. The controller may execute a source selection algorithm configured to minimize HPB entry inactivation resulting from data relocation. The source selection algorithm may include a criterion to enable the controller to select a source block for relocation.Type: GrantFiled: August 1, 2023Date of Patent: May 27, 2025Assignee: SANDISK TECHNOLOGIES INCInventors: Laxmi Bhoopali, Ramanathan Muthiah, Savita Neelannavar
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Patent number: 12299292Abstract: An apparatus includes a memory configured to store data, and a processor. The processor configured to determine whether an access to the data is a local memory access; determine, based on a result of the determination of whether the access to the data is the local memory access, whether a page fault of the access occurred; determine, based on a result of the determination of whether the page fault occurred, whether the access is a remote access outside a socket; and perform, based on a result of the determination of whether the access is the remote access, the access to the data by copying the data onto a local memory.Type: GrantFiled: December 28, 2022Date of Patent: May 13, 2025Assignee: Samsung Electronics Co., Ltd.Inventors: Sungduk Cho, Ruth Kim, Dong-Uk Ryu, Jaewon Lee
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Patent number: 12293079Abstract: A method may include receiving, at a storage device, an input and/or output (I/O) request comprising a device indication performing a determination, at the storage device, that the device indication indicates the storage device, and servicing, by the storage device, the I/O request based on the determination. The device indication may include an address for the I/O request. The method may include installing a second storage device in the storage system. The second storage device may be installed seamlessly. The first and second storage devices may be peer devices. The method may further including receiving, at the first storage device, a second I/O request including a second device indication, performing a second determination, by the first storage device, that the second device indication indicates the second storage device, and forwarding, by the first storage device, the second I/O request to the second storage device based on the second determination.Type: GrantFiled: February 4, 2022Date of Patent: May 6, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Veronica Lagrange Moutinho Dos Reis, Vishwanath Maram, Matthew Bryson, Gayathri Venkataraman
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Patent number: 12287980Abstract: Systems and methods for performing a fast resynchronization of a mirrored aggregate of a distributed storage system using disk-level cloning are provided. According to one embodiment, responsive to a failure of a disk of a plex of the mirrored aggregate utilized by a high-availability (HA) pair of nodes of a distributed storage system, disk-level clones of the disks of a healthy plex may be created external to the distributed storage system and attached to the degraded HA partner node. After detection of the cloned disks by the degraded HA partner node, mirror protection may be efficiently re-established by assimilating the cloned disks within the failed plex and then resynchronizing the mirrored aggregate by performing a level-1 resync of the failed plex with the healthy plex based on a base file system snapshot of the healthy plex. In this manner, a more time-consuming level-0 resync may be avoided.Type: GrantFiled: May 29, 2024Date of Patent: April 29, 2025Assignee: NetApp, Inc.Inventors: Sangramsinh Pandurang Pawar, Bhoovaraghan Subramanian, William Derby Dallas, Sowkoor Sunad Bhandary, Rajesh Rajarman, FNU Sahasranshu
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Patent number: 12282656Abstract: A random read miss slot size selection engine is configured to select between multiple memory slot sizes to optimize slot size allocations for random read miss IO operations. Upon receipt of an IO operation that is a random read miss IO operation, the slot size selection engine obtains a metadata page encompassing multiple entries in addition to an entry associated with the random read miss IO operation. The slot size selection engine performs a metadata temporal analysis to analyze temporal information associated with previous slot allocations identified in the metadata page. The slot size selection engine also performs a metadata spatial analysis to spatially analyze previous slot allocations to neighboring tracks identified in the metadata page. In response to a determination that the metadata page contains a threshold number of recent slot allocations, the spatial analysis is used to determine the slot size to allocate to the random read miss.Type: GrantFiled: January 3, 2024Date of Patent: April 22, 2025Assignee: Dell Products, L.P.Inventors: Ramesh Doddaiah, Kaustubh Sahasrabudhe, Malak Alshawabkeh
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Patent number: 12282687Abstract: Described are systems and methods for prioritization of background media management operations in memory systems. An example system comprises a controller coupled to a memory array comprising a plurality of memory cells. The controller is configured to perform operations, comprising: identifying a plurality of address ranges referencing respective sets of memory cells of the memory array, wherein each address range is associated with a respective memory access operation counter reflecting a number of memory access operations that have been performed with respect to a corresponding set of memory cells; identifying, among the plurality of address ranges, an address range associated with a maximum value of a corresponding memory access operation counter; and causing a media management operation to be performed with respect to a set of memory cells referenced by the identified address range.Type: GrantFiled: May 18, 2023Date of Patent: April 22, 2025Assignee: Micron Technology, Inc.Inventors: Luca Porzio, Ciro Feliciano
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Patent number: 12282679Abstract: A drive placement or placement functionality can enable initial copies of data to be placed on a drive in reclaim unit (HRUs) in a manner which is probabilistically more efficient from a garbage collection (GC) perspective and leverages knowledge of a host or application using the data. The placement functionality enables the advantages of fine-grained placement functionality while simultaneously allowing a storage device or storage drive to maintain NAND or other management responsibility, and not allocate that responsibility to an application or host device using the device.Type: GrantFiled: July 13, 2022Date of Patent: April 22, 2025Assignee: Google LLCInventors: Christopher Sabol, Manuel Benitez
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Patent number: 12271629Abstract: The present technology relates to an electronic device. According to the present technology, a host device may include a garbage collection controller and an idle time processor. The garbage collection controller may provide, to a storage device, a health information request command for requesting health information including a host write amount and a storage device write amount, provide, to the storage device, a first garbage collection control command for requesting garbage collection cost information based on the health information, provide, to the storage device, a second garbage collection control command for instructing to perform garbage collection based on the garbage collection cost information and an idle time of the storage device. The idle time processor may process information on the idle time.Type: GrantFiled: December 14, 2022Date of Patent: April 8, 2025Assignee: SK hynix Inc.Inventors: Jeong Ho Jeon, Kang Rak Kwon
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Patent number: 12260097Abstract: In some implementations, a memory device may determine, from a list of key-value pair sets, a key-value pair set. The memory device may identify, from the key-value pair set selected from the list of key-value pair sets, a first key that is included in at least one other key-value pair set from the list of key-value pair sets. The memory device may identify, from the key-value pair set selected from the list of key-value pair sets, a second key that is not included in at least one other key-value pair set from the list of key-value pair sets. The memory device may form a new key-value pair set that excludes the first key and includes the second key. The memory device may replace the key-value pair set selected from the list of key-value pair sets with the new key-value pair set.Type: GrantFiled: November 27, 2023Date of Patent: March 25, 2025Assignee: Micron Technology, Inc.Inventors: Gregory Alan Becker, Alexander Tomlinson
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Patent number: 12254204Abstract: A data storage device and method are disclosed for host-controlled data compression. In one embodiment, a data storage device is provided comprising a memory and a controller configured to communicate with the memory. The controller is further configured to selectively compress target data, wherein the target data is only compressed in response to receiving a compression request from a host; receive the compression request from the host; and in response to receiving the compression request from the host, compress the target data. Other embodiments are disclosed.Type: GrantFiled: July 26, 2023Date of Patent: March 18, 2025Assignee: Sandisk Technologies, Inc.Inventors: Prabhakar Ballapalle, ANup Srikanth
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Patent number: 12254198Abstract: According to one embodiment, a memory system includes a non-volatile memory including a plurality of physical blocks and a controller. The controller is configured to allocate the plurality of physical blocks to a plurality of first block sets each including physical blocks among the plurality of physical blocks, generate a plurality of groups obtained by grouping the plurality of first block sets by the number of defective physical blocks included in each of the plurality of first block sets, and select a plurality of the first block sets from at least two groups of the plurality of groups to generate a second block set from the plurality of selected first block sets.Type: GrantFiled: February 27, 2023Date of Patent: March 18, 2025Assignee: Kioxia CorporationInventor: Tetsuya Yasuda
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Patent number: 12248397Abstract: Methods for recording commands in memory and providing the recorded commands. In one embodiment, a data storage controller includes a memory interface configured to interface with a memory, a controller memory including a storage firmware and a record mapping table, and a processor. The processor, when executing the storage firmware, is configured to receive a record identifier, receive a command including data to be stored in the memory, and create an entry in the record mapping table associating the record identifier with a logical block address of the command. The command is received after the record identifier. The processor may receive a playback identifier that includes the record identifier and determine, using the record mapping table, a location of the associated command in the memory. The command is provided to an external device.Type: GrantFiled: July 28, 2023Date of Patent: March 11, 2025Assignee: Sandisk Technologies, Inc.Inventors: Daniel J. Linnen, Ramanathan Muthiah, Niles Yang, Judah Gamliel Hahn, Mark Shlick
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Patent number: 12242389Abstract: An application-level memory control group of a first application may be created when the first application is opened. An anonymous page of the first application is added to a least recently used linked list of the application-level memory control group, and a file page of the first application is added to a global least recently used linked list. An application-level memory control group is created in a dimension of an application, and an anonymous page of the application is managed in a refined manner. In addition, a file page of the application-level memory control group may be managed based on a global least recently used linked list.Type: GrantFiled: October 26, 2021Date of Patent: March 4, 2025Assignee: HUAWEI DEVICE CO., LTD.Inventors: Wei Han, Chang Xie, Qinxu Pan, Jian Chen, Qiang Gao, Song Liu, Jinxuan Fang, Yuanfeng Hu, Xiangbing Tang, Weilai Zhou, Cai Sun, Zuoyu Wu, Qing Xia, Wei Du, Biao He, Fa Wang, Chengke Wang, Ziyue Luo, Zongfeng Li, Xu Wang, Xiyu Zhou, Yu Liu, Tao Li, Long Jin, Di Fang