Patents Examined by Janie L. Brophy
  • Patent number: 6326317
    Abstract: Disclosed is a method for manufacturing a metal oxide semiconductor FET (MOSFET), which utilizes a low-temperature liquid phase oxidation for III-V group. The method includes the steps of (a) providing a substrate, (b) forming an epitaxial layer on the substrate, (c) defining and forming a drain and a source on a portion of the epitaxial layer, (d) forming a recess in an another portion of the epitaxial layer, (e) forming an oxide layer on a surface of the recess by relatively low-temperature oxidation, and (f) forming a gate on a portion of the oxide layer between the drain and source. In addition, the method further includes two selective procedures, that is, a synchronic sulfurated passivation process which can be performed with the growth of the oxide film simultaneously, and a rapid thermal annealing (RTA) process.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: December 4, 2001
    Assignee: National Science Council
    Inventors: Hwei-Heng Wang, Yeong-Her Wang, Mau-Phon Houng