Abstract: One embodiment relates to a method of controlling supply voltage regulation within an integrated circuit. An external interrupt is sent from an external interaction processing layer to a processor in the integrated circuit. Off-die instructions are generated by the external interaction processing layer and sent to the processor. The off-die instructions are executed by the processor to test and adjust supply voltage regulation within the integrated circuit on a sector-by-sector basis. Another embodiment relates to a method of controlling a supply voltage regulator for a sector of an integrated circuit. Commands are sent by a processor and translated by a sector manager to bits. The bits are loaded into registers so as to set the regulator control circuit to the testing mode send a supply voltage to an analog-to-digital converter. Other embodiments and features are also disclosed.

Abstract: A semiconductor device manufacturing method and a semiconductor device manufacturing system for irradiating a first laser light (50) and a second laser light (52) with a wavelength different from that of the first laser light to a substrate (46) to perform a thermal processing on the substrate are provided. In the step for performing the thermal processing, at least one of an irradiation intensity and an irradiation time of a first laser and a second laser is controlled to control a temperature distribution in the substrate or a film on the substrate in a depth direction.

Abstract: The present invention provides a method and apparatus for modifying process selectivities based on process state information. The method includes accessing process state information associated with at least one material removal process, determining at least one selectivity based on the process state information, and modifying at least one process parameter of said material removal process based on said at least one determined selectivity.

Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The method for manufacturing the imaging device includes the steps of providing a substrate comprising an insulator layer, and an epitaxial layer substantially overlying the insulator layer; fabricating at least one imaging component at least partially overlying and extending into the epitaxial layer; forming a plurality of bond pads substantially overlying the epitaxial layer; fabricating a dielectric layer substantially overlying the epitaxial layer and the at least one imaging component; providing a handle wafer; forming a plurality of conductive trenches in the handle wafer; forming a plurality of conductive bumps on a first surface of the handle wafer substantially underlying the conductive trenches; and bonding the plurality of conductive bumps to the plurality of bond pads.

Abstract: The invention provides a method for fabricating a memory device having memory cells which are formed on a microstructured driving unit (100), in which method a shaping layer (104) is provided and is patterned in such a manner that vertical trench structures (105) are formed perpendicular to the surface of the driving unit (100). Deposition of a seed layer (106) on side walls (105a) of the trench structures (105) allows a crystallization agent (107) which has filled the trench structures (105), during crystallization, to have grain boundaries perpendicular to electrode surfaces that are to be formed. This provides memory cells based on vertical ferroelectric capacitors in a chain FeRAM structure.

Abstract: Disclosed are a semiconductor wafer (10) having a front side laser scribe (22) and the methods for manufacturing the same. The methods of the invention include the formation of a scribe foundation (12) on the front side of the semiconductor wafer (10) designed to accept laser scribing (22), and laser scribing the scribe foundation (12). Disclosed embodiments include a semiconductor wafer (10) having a scribe foundation (12) of layered dielectric (30) and metal (34) on the front side. According to disclosed embodiments of the invention, the formation of a scribe foundation (12) is performed in combination with the formation of a top level metal layer (34) on the semiconductor wafer (10) methods for manufacturing.

Abstract: A plurality of semiconductor nanoparticles having an elementally passivated surface are provided. These nanoparticles are capable of being suspended in water without substantial agglomeration and substantial precipitation on container surfaces for at least 30 days. The method of making the semiconductor nanoparticles includes reacting at least a first reactant and a second reactant in a solution to form the semiconductor nanoparticles in the solution. A first reactant provides a passivating element which binds to dangling bonds on a surface of the nanoparticles to passivate the surface of the nanoparticles. The nanoparticle size can be tuned by etching the nanoparticles located in the solution to a desired size.

Abstract: A method for forming a conductive via or through-wafer interconnect (TWI) in a semiconductive substrate for use as a contact card, test connector, semiconductor package interposer, or die interconnect includes the acts of (a) forming an oxide or nitride layer on both sides of the substrate, (b) forming a precursor aperture in the substrate at a desired location by laser or etch, (c) further etching the precursor aperture to enlarge and shape at least a portion thereof with undercut portions below an initial etch mask layer, (d) lining the aperture with a passivation material, (e) filling the aperture with a conductive material, and (f) thinning one or both surfaces of the substrate to achieve desired stand-off distances of the opposed via ends. The shaped via aperture has an enlarged central portion, and one or more end portions which taper to smaller end surfaces. The one or more via end portions may be trapezoidal in shape. A further rounding etch act following the shaping etch will result in a rounded, i.