Patents Examined by Jasjit Vidwan
  • Patent number: 8972615
    Abstract: A computer program product is provided for performing: obtaining, by a channel subsystem, a transport command word (TCW) specified by an operating system, the TCW comprising an address of a transport services request block (TSRQB) and an address of a transport services response block (TSRSB); obtaining the TSRQB; building at least one command request based on the TSRQB, and sending the at least one command request from the channel subsystem to at least one network entity, the at least one command request including at least one of a fiber-channel generic services (FC-GS) request, a fiber-channel link services (FC-LS) request, and a fiber-channel link-level function (FC-SB) request; receiving a response to the at least one command request from the at least one network entity; and storing the response to the TSRSB based on the address of the TSRSB obtained from the TCW.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: March 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Daniel F. Casper, Patricia G. Driever, John R. Flanagan, Louis W. Ricci, Gustav E. Sittmann, III
  • Patent number: 8621118
    Abstract: Various techniques and hardware are described for retrieving information in a processing system. In one embodiment, a method is provided for retrieving information in a processing system that includes a central processing unit and a service processor. Here, the service processor retrieves central processing unit information from the central processing unit and resets the processing system after the retrieval of the central processing unit information.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: December 31, 2013
    Assignee: NetApp, Inc.
    Inventors: Chaitanya Nulkar, Brad Reger, Pradeep Kalra, Johnny Kang-wing Chan, Thomas Holland
  • Patent number: 8560741
    Abstract: A data processing system 100 comprising a monitor 120 is provided and corresponding system-on-chip, method for monitoring and computer program product. The data processing system comprises multiple processing devices 104, 106, 116, 116 and a monitor 120. The monitor is configured to monitor characteristics of the data streams 102, 112, occurring among the plurality of data processing devices. The monitor comprises a means to determine whether a system characteristic substantially deviates from an expected system characteristic and to raise an anomaly signal if so. The system characteristic depends on the first characteristic and the second characteristic. In this way the monitor increases robustness by monitoring for problems related to deviations in the relation between multiple data streams.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: October 15, 2013
    Assignee: Synopsys, Inc.
    Inventors: Marc Jeroen Geuzebroek, Andre Krijn Nieuwland, Hubertus Gerardus Hendrikus Vermeulen
  • Patent number: 8549193
    Abstract: A data transmission method is provided, which includes: obtaining a current queue length of a queue corresponding to an output port; when the current queue length meets a back-pressure requirement, determining a back-pressure priority corresponding to the current queue length according to the current queue length and a mapping relationship between a preset queue length and the back-pressure priority, and generating back-pressure information, where the back-pressure information inhibits a line card from sending data with a data priority less than or equal to the back-pressure priority to the output port; and sending the back-pressure information to a line card.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: October 1, 2013
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Wumao Chen
  • Patent number: 8549189
    Abstract: The present invention is a flexible input/output translation system and method that facilitates conservation of chip pin resources while permitting flexible and dynamic changes to processor support operations on the fly. A present invention input/output translator includes a consolidated indication port, translation logic, a plurality of translated indication ports and an initialization port. The consolidated indication port receives a consolidated indication signal (e.g., indicating a desired voltage level) from a general purpose input/output port of a processor. The translation logic translates the consolidated indication signal into a plurality of translated indication signals. The plurality of translated indication ports communicate the plurality of translated indication signals. The initialization port receives an initialization signal.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: October 1, 2013
    Assignee: Nvidia Corporation
    Inventor: Senthil S. Velmurugan
  • Patent number: 8521914
    Abstract: A method for communicating via a bus including a first channel, a second channel, and a third channel is disclosed. The method includes addressing a slave device via the first channel, receiving from the slave device via the second channel, and writing to the slave device via the third channel. The method further includes selecting between first and second bus transmission modes. In the first bus transmission mode, payload write data is to be sent to the slave device via the first channel or the third channel. In the second bus transmission mode, during a first clock cycle, second payload write data associated with a second write operation is to be sent to the slave device via the first channel and first payload write data associated with a first write operation is to be concurrently sent to the slave device via the third channel.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: August 27, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Richard Gerard Hofmann, Terence J. Lohman
  • Patent number: 8504780
    Abstract: A computer includes first and second processors, first and second I/O devices, a shared memory, and an interrupt controller. The first processor issues a control command for causing the first I/O device to read target data from the first apparatus and store the target data in the shared memory. The first I/O device reads the target data from the first apparatus and, transfers the target data to the shared memory, and generates an I/O complete interrupt. The interrupt controller delivers the generated I/O complete interrupt to the second processor. When the second processor receives the I/O complete interrupt, the second processor issues a control command for causing the second I/O device to read the target data from the shared memory and send the target data to the second apparatus. The second I/O device reads the target data from the shared memory and sends the target data to the second apparatus.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: August 6, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Mine, Ken Nomura, Damien Le Moal, Tadashi Takeuchi
  • Patent number: 8499103
    Abstract: A converter apparatus is provided enabling conversion of data between different form factor pluggable standards. The converter comprises a first connector that connects to a first device according to a first form factor pluggable standard, and a second connector that connects to a second device according to a second form factor pluggable standard. The converter further comprises a signal processor coupled between the first connector and the second connector. The processor converts at least one of transmit signals in the first form factor pluggable standard to transmit signals in the second form factor pluggable standard and receive signals in the second form factor pluggable standard to receive signals in the first form factor pluggable standard. A controller in the converter is coupled to the processor and to the first and second connector. The controller configures the processor to be used for converting signals between the form factor pluggable standards.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: July 30, 2013
    Assignee: Cisco Technology, Inc.
    Inventors: Adam J. Carter, Karthik Ramaswamy, Marco Mazzini, Norman Tang
  • Patent number: 8484388
    Abstract: A data transmission method is provided, which includes: obtaining a current queue length of a queue corresponding to an output port; when the current queue length meets a back-pressure requirement, determining a back-pressure priority corresponding to the current queue length according to the current queue length and a mapping relationship between a preset queue length and the back-pressure priority, and generating back-pressure information, where the back-pressure information inhibits a line card from sending data with a data priority less than or equal to the back-pressure priority to the output port; and sending the back-pressure information to a line card.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: July 9, 2013
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Wumao Chen
  • Patent number: 8478908
    Abstract: A fieldbus gateway using a virtual serial fieldbus port and a data transmission method thereof are provided. By receiving a fieldbus frame containing target data through a virtual serial fieldbus port connected to a source device or a target device via a fieldbus gateway and sending another fieldbus frame containing the target data via other fieldbus port to target devices or source devices, the system and the method can provide two or more remote devices to control one controlled device at the same time. The invention also achieves the effect of using one virtual serial fieldbus port to transmit data between multiple source devices and target devices concurrently.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: July 2, 2013
    Assignee: Moxa Inc.
    Inventors: Bo Er Wei, Chun Fu Chuang
  • Patent number: 8468277
    Abstract: A service device that comprises a storage drive, where the storage drive includes an installer program, a device driver, and a mass storage interface. The mass storage interface is configured to enumerate the storage drive to a client device when the service device is coupled to the client device for a first time. The client device auto-launches the installer program in response to the service device being enumerated to the client device for the first time. The installer program installs the device driver in the client device in response to being auto-launched.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: June 18, 2013
    Assignee: Marvell International Ltd.
    Inventors: Kevin Thompson, Eric Luttmann, David Watkins
  • Patent number: 8458367
    Abstract: An SMBus message handler, an integrated circuit and a method for controlling an SMBus are disclosed which identifies starting address of a program being stored in a memory. Instructions of the program are fetched one after another into a finite-state machine which controls the data transfer between an SMBus interface and a register set in compliance with the instruction present in the finite-state machine. Further, an SMBus test device and a method for controlling a testing system are described which check as to whether a key is input from a second interface. Upon inputting of a key it is mapped to a sequence of instructions for controlling devices connected to the SMBus or transferring data or receiving data from the devices connected to the SMBus.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: June 4, 2013
    Assignee: Advanced Micro Devices
    Inventors: René Röllig, Andreas Abt, Frank Schücke, Bernd Schönfelder, Daniel Schöne, Gert Springer
  • Patent number: 8452899
    Abstract: A method for data distribution, including distributing logical addresses among an initial set of devices so as provide balanced access, and transferring the data to the devices in accordance with the logical addresses. If a device is added to the initial set, forming an extended set, the logical addresses are redistributed among the extended set so as to cause some logical addresses to be transferred from the devices in the initial set to the additional device. There is substantially no transfer of the logical addresses among the initial set. If a surplus device is removed from the initial set, forming a depleted set, the logical addresses of the surplus device are redistributed among the depleted set. There is substantially no transfer of the logical addresses among the depleted set. In both cases the balanced access is maintained.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: May 28, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ofir Zohar, Yaron Revah, Haim Helman, Dror Cohen
  • Patent number: 8443119
    Abstract: Auto-trespass can be at least temporarily disabled subsequent to an automatic failover. The automatic failover exchanges roles between an active path and a passive path, such that the passive path becomes the active path and vice versa. By disabling auto-trespass, hosts that are unaware that the automatic failover has occurred will not trigger another failover when those hosts attempt to perform I/O operations via the formerly-active path. This can reduce performance decreases that would otherwise occur due to the active role being traded in a “ping-pong” manner between the paths.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: May 14, 2013
    Assignee: Symantec Operating Corporation
    Inventors: Prasad Limaye, Mukul Kumar, Mayuresh Phadke
  • Patent number: 8443112
    Abstract: A transmitting section 7a outputs a transmission signal to the side of a transmission line 1. A first switching section Qa1 outputs the transmission signal to the transmission line 1. A second switching section Qa2 outputs the transmission signal from the transmission line 1. A receiving section 9a receives the transmission signal from the transmission line 1. A first detecting section 13a detects the transmission signal flowing through the first switching section Qa1. A second detecting section 19a detects the transmission signal flowing through the second switching section Qa2. When the transmission signal from the transmitting section 7a is not detected at both the first and second detecting sections 13a and 19a, a selecting section 15a selects the receiving section 9a and outputs a reception signal.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: May 14, 2013
    Assignee: B & Plus K.K.
    Inventor: Mitsuo Takarada
  • Patent number: 8438318
    Abstract: A television with at least one connection, either wired or wireless. Detection of an active device connected to the connection results in proper software and hardware configuration of the television to properly communicate with the device and provide, for example, proper user interface support and access to the device.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: May 7, 2013
    Assignee: Vizio, Inc.
    Inventors: Matthew Blake McRae, John Schindler
  • Patent number: 8429316
    Abstract: Some of the embodiments of the present disclosure provide a method comprising categorizing each data packet of a plurality of data packets into one of at least two priority groups of data packets; and controlling transmission of data packets of a first priority group of data packets during a first off-time period such that during the first off-time period, data packets of the first priority group of data packets are prevented from being transmitted to a switching module from one or more server blades. Other embodiments are also described and claimed.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: April 23, 2013
    Assignee: Marvell International Ltd.
    Inventor: Martin White
  • Patent number: 8429307
    Abstract: This invention is a system and a method for operating a storage server that provides read or write access to a data in a data network using a new architecture. The method of processing I/Os in response to a request by a client of the storage server executes one or more services communicated by a policy engine. The I/Os received from the application are tagged and catalogued to create co-related I/O patterns. The policy engine is then updated with the results of processing the I/Os after executing services on those I/Os.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: April 23, 2013
    Assignee: EMC Corporation
    Inventors: Sorin Faibish, Philippe Armangau, Christopher Seibel
  • Patent number: 8429311
    Abstract: A process is provided for transferring a first sequence control and/or first data into a first control device and a second sequence control and/or second data into a second control device in a motor vehicle. The transfer is carried out by way of a first data bus while using a first transmission protocol which has a data frame with a predetermined frame format or message format, and the transfer as a whole takes place by the transmission of a plurality of data frames. In a first step, by way of a first data frame, a portion of the first sequence control and/or of the first data is transmitted to the first control device. In a second step, by way of the second data frame, a portion of the second sequence control and/or of the second data is transmitted to the second control device.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: April 23, 2013
    Assignee: Bayerische Motoren Werke Aktiengesellschaft
    Inventors: Thomas Koenigseder, Martin Baumgartner, Mohamed Majdoub
  • Patent number: 8417852
    Abstract: A system and methods of uploading payload data to user buffers in system memory and of uploading partially processed frame data to legacy buffers allocated in Operating System memory space are described. User buffers are stored in a portion of system memory allocated to an application program, therefore data stored in user buffers does not need to be copied from another portion of system memory to the portion of system memory allocated to the application program. When partially processed frame data is uploaded by hardware to a legacy buffer in system memory, a tag, uniquely identifying the legacy buffer location is transferred by the hardware to a TCP stack, enabling the TCP stack to locate the legacy buffer.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: April 9, 2013
    Assignee: Nvidia Corporation
    Inventors: Anand Rajagopalan, Radoslav Danilak, Paul J. Gyugyi, Ashutosh K. Jha, Thomas A. Maufer, Sameer Nanda, Paul J. Sidenblad