Patents Examined by Jason B Bryan
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Patent number: 12724660Abstract: Systems and methods for determining risk and recyclability of IHSs in response to accidents are described. In some embodiments, an Information Handling System (IHS) may include: a processor; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause an Operating System (OS) to: receive an accident indication of the IHS or a second IHS; and determine information regarding recyclability, condition, or risk of the IHS or second IHS based, at least in part on, the accident indication. In some embodiments, the information regarding the recyclability, condition, or risk of the IHS or second IHS can include: (1) a recyclability score that indicates a likelihood that the IHS or the second IHS can be refurbished or resold, and/or (2) a risk score that indicates a likelihood of one or more repairs for the IHS or the second IHS.Type: GrantFiled: November 30, 2023Date of Patent: September 1, 2026Assignee: Dell Products L.P.Inventors: Alan H. Abdelhalim, Ibrahim Sayyed, Balasingh P. Samuel, Daniel L. Hamlin
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Patent number: 12724679Abstract: Systems and methods for avoiding retraining a communication bus after a link failure are disclosed. In particular, in a communication bus that retrains a main band on failure of a sideband, aspects of the present disclosure contemplate using a redundant sideband to keep the bus active and avoid retraining the main band while the failed sideband is recovered. While particularly useful for a Universal Chiplet Interconnect express (UCIe) bus, aspects of the present disclosure may be applicable to other buses with similar sideband arrangements. By avoiding retraining the main band, communication between chiplets is not interrupted, thereby reducing latency for communication between chiplets and improving the user experience.Type: GrantFiled: February 6, 2025Date of Patent: September 1, 2026Assignee: QUALCOMM IncorporatedInventors: Ravindranath Doddi, Ramacharan Sundararaman, Umamaheshwaran V
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Patent number: 12717670Abstract: Described are devices, systems and methods for monitoring a health status of a thread. A method of monitoring a health status of a thread comprises: invoking a callback for the thread to write a begin record and an end record in an aliveness record that corresponds to the thread, the aliveness record being stored in a memory; detecting an unhealthy status of the thread by reading the aliveness record from the memory; and reporting the unhealthy status of the thread in response to the detecting.Type: GrantFiled: November 15, 2024Date of Patent: August 25, 2026Assignee: CreateAI, Inc.Inventors: Jinshan Xiong, Chaojie Deng
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Patent number: 12711011Abstract: A system described herein may receive a request to perform a blockchain operation that includes a set of computations; identify portions of the blockchain operation, which each include a respective subset of the set of computations; perform a first subset of computations, of the set of computations, that are associated with a first portion of the blockchain operation; identify a set of outputs that result from performing the first subset of computations; identify, prior to completing the blockchain operation, a failure condition that prevents complete performance of a second subset of computations; perform the second subset of computations using the set of outputs that result from performing the first subset of computations; and communicate with a plurality of nodes, that maintain a blockchain, to record a result of performing the first and second subsets of computations to the blockchain.Type: GrantFiled: November 22, 2024Date of Patent: August 18, 2026Assignee: Verizon Patent and Licensing Inc.Inventors: Ahmed A. Khan, Mohammed Alsadi, Joel Jimenez, Carl Paul Coursen
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Patent number: 12711023Abstract: Methods, systems, and devices for efficient data management for memory system error handling are described. If a new data transfer is desired between the controller and a memory device when the latches are full, the controller may obtain data that has been loaded in one of the latches, temporarily store that data in a buffer, and overwrite the latch with the new data associated with the new data transfer. After the controller is finished working with the new data now stored in the latch, the controller may restore the data from the buffer to the latch so the prior data transfer may continue. This may prevent loss of data or reduce the quantity of data that is temporarily lost from latches and needs to be re-transferred when the latches are full.Type: GrantFiled: February 19, 2024Date of Patent: August 18, 2026Assignee: Micron Technology, Inc.Inventors: Nitul Gohain, Jameer Mulani, Jonathan S. Parry
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Patent number: 12711024Abstract: The apparatus for recovery of protected segments (mSets) at run time or after an ungraceful shutdown (UGSD) event, such as in a host memory buffer (HMB) error case, utilizes a shadow structure (e.g., shadow update layer (uLayer)) that is be stored in the memory device (e.g., flash) in an mBlock and is used only for recovery of protected mSets. The approach also allows significantly increasing a number of protected mSets because the proposed shadow uLayer structure avoids flushing all protected mSets at Control Sync (CS). The expected performance gains and reducing of write amplification of control data cover the overhead costs of processing the shadow structure.Type: GrantFiled: October 14, 2024Date of Patent: August 18, 2026Assignee: Sandisk Technologies, Inc.Inventors: Marina Frid, Vered Kelner, Igor Genshaft
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Patent number: 12705150Abstract: Various embodiments provide handling block program failure in a memory sub-system that supports zones. In particular, some embodiments described herein handle block program failure during a data write (e.g., host data write) to a cache block of a zone on a memory device on a memory sub-system, block program failure during refresh of a cache block of a zone on a memory device on a memory sub-system, block program failure during migration of data between a cache block and a non-cache block of a zone on a memory device on a memory sub-system, block program failure during refresh of a non-cache block of a zone on a memory device on a memory sub-system, or some combination thereof.Type: GrantFiled: July 30, 2024Date of Patent: August 11, 2026Assignee: Micron Technology, Inc.Inventors: Juane Li, Amit Bhardwaj, Michael Winterfeld
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Patent number: 12693942Abstract: A system detects a switch off event sent by a virtual machine management server, and identifies a virtual machine that is tagged by the switch off event and protected by a data protection server, and applies a deletion lock to the virtual machine. The system detects a deletion event sent by the virtual machine management server, and identifies a virtual machine that is tagged by the switch off event, protected by the data protection server, and tagged by the deletion event. The system creates a backup file for the virtual machine that is tagged by the deletion event. The system releases the deletion lock from protecting the virtual machine that is tagged by the deletion event. If the deletion event was accidental or malicious, the system uses the backup file to restore the virtual machine which was deleted by the deletion event after the release of the deletion lock.Type: GrantFiled: March 5, 2025Date of Patent: July 28, 2026Assignee: Dell Products L.P.Inventors: Prakash Appayya Acharya, Sharath Talkad Srinivasan
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Patent number: 12693938Abstract: A backup process implemented by generating data to be backed up from a file-based application or an object-based application from a respective application host. A generic proxy component collocated with the application host is deployed and contains protocol specific servers and a DDBoost client. The data is transmitted from the application host to the generic proxy using a defined file transfer protocol. The data is then transformed in a protocol specific server of the generic proxy to a format compatible with the DDBoost client, and to leverage distributed segment processing (DSP) to optimize data transfers using the generic proxy. The transformed data is then transmitted to a backup system over a network using a data transmission protocol and the data stored by the backup system in a data storage target.Type: GrantFiled: January 28, 2025Date of Patent: July 28, 2026Assignee: Dell Products L.P.Inventors: Omkar Anand Ekbote, Vikas Jagannath Chaudhary
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Patent number: 12693948Abstract: A scale-out computing cluster may include a large number of computing servers and storage devices. In order to provide high reliability, the computing cluster must be able to handle failures of individual devices. Reliability of the computing cluster may be improved by providing a standby server for each active server in the computing cluster. If any active server fails, the corresponding standby server is activated. The failed server may be brought back online or replaced, at which time the restored server becomes the standby server for the now-active original standby server. During the restoration period, if any other active server fails, the standby server for that active server is immediately activated. As a result, the recovery ability of the computing cluster is only challenged if both servers of an active/standby pair fail during the restoration period, substantially improving reliability.Type: GrantFiled: March 26, 2025Date of Patent: July 28, 2026Assignee: SAP SEInventors: Markus Behrens, Reiner Singer, Werner Thesing, Yue Zhu, Mitja Kleider, Omran Saleh, Timo Sulg, Marcel Birn, Christoph Roterring
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Patent number: 12688091Abstract: A method comprises establishing a communications channel between a host device operating system and a chassis management module of a chassis, analyzing, by the chassis management module, operational data corresponding to one or more chassis components and data corresponding to usage of one or more nodes by the host device operating system, and activating one or more of a plurality of flags based at least in part on the analyzing, wherein the plurality of flags respectively correspond to different failure events associated with at least one of the one or more chassis components and the one or more nodes. The one or more flags are sent from the chassis management module to the host device operating system via the communications channel.Type: GrantFiled: August 12, 2024Date of Patent: July 21, 2026Assignee: Dell Products L.P.Inventors: Parminder Singh Sethi, Raahul Kumar, Veena Ramarao
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Patent number: 12688093Abstract: Aspects of the present disclosure provide a monitoring algorithm that ensures that each step of an automated virtual machine reclamation process executes correctly before moving on to the next step. After each step of the process, some implementations can determine whether the resulting data is correct. If the resulting data is incorrect, some implementations can initially revert any fields updated by the process to their correct value. Some implementations can further decide whether to resubmit the virtual machine for reclamation automatically, or queue it for manual review based on, for example, multiple or repeated failures, server or data center failures, etc. Thus, some implementations can not only automate each step of the reclamation process, but also provide process evaluation and error detection for the reclamation process.Type: GrantFiled: February 19, 2025Date of Patent: July 21, 2026Assignee: United Services Automobile Association (USAA)Inventors: Ahmad Ali Shaik, Arturo Zuniga
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Patent number: 12688100Abstract: OP logs are utilized for fast recovery of synchronous replication in a storage system. According to one embodiment, a computer-implemented method comprises establishing synchronous replication between one or more storage objects of a first consistency group (CG1) of a primary storage site and one or more storage objects of a second consistency group (CG2) of a secondary storage site, initiating a peer health check to determine a health condition of the primary storage site and concurrently initiating a create snapshot process to create a snapshot of one or more storage objects of the CG2 of the secondary storage site in response to detection of missing heartbeat communications from the primary storage site, and performing inflight tracking replay and reconciliation between a first Op log of the primary storage site and a second Op log of the secondary storage site when an out of sync state or failover occurs.Type: GrantFiled: January 22, 2025Date of Patent: July 21, 2026Assignee: NetApp, Inc.Inventors: Akhil Kaushik, Anoop Vijayan, Sohan Shetty, Preetham Kudgi Shenoy, Krishna Murthy Chandraiah Setty Narasingarayanapeta
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Patent number: 12681821Abstract: A test method and system based on a variable combination time sequence function coverage are provided, where the method includes: constructing a variable combination time sequence function coverage structure, and using the variable combination time sequence function coverage structure as a random constraint; determining a random seed of each value range of each variable in the variable combination time sequence function coverage structure; sequentially obtaining a time point as a current time point based on a time sequence of the variable combination time sequence function coverage structure; obtaining a value segment of each variable at the current time point from the variable combination time sequence function coverage structure, to form a variable combination structure at the current time point; and for the variable combination structure at the current time point, generating a random excitation of each variable to perform testing in a current scenario.Type: GrantFiled: April 13, 2023Date of Patent: July 14, 2026Assignee: Jinan Xinyu Software Technology Co., Ltd.Inventors: Min Yi, Ming Wei, Min Cheng, Yunzhao Yang, Chuanqiang Shen, Tianhao Yi
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Patent number: 12681799Abstract: A method for managing a data protection system includes obtaining, by an interaction manager, a failure notification for a data protection workload executing on the data protection system, wherein the data protection system comprises a plurality of services, and wherein the data protection workload is executed by the plurality of services communicating with each other using application programming interface (API) calls, based on the failure notification, identifying a portion of the plurality of services used for the data protection workload, performing a recreation of the data protection workload to identify a failure point associated with the failure notification, and performing a remediation action of the data protection workload based on the recreation.Type: GrantFiled: January 16, 2025Date of Patent: July 14, 2026Assignee: Dell Products L.P.Inventors: Avinash Kumar, Gururaj Kulkarni, Shelesh Chopra
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Patent number: 12675379Abstract: Apparatuses, systems, and techniques to adjust a number of processors to be used by software. In at least one embodiment, as a result of a failure of one or more processors of a first group of processors, software performed by this first group of processors to be restarted, using a second smaller group of processors.Type: GrantFiled: April 19, 2024Date of Patent: July 7, 2026Assignee: NVIDIA CorporationInventors: Abhijit Prakash Paithankar, Suryanarayan Ramamurthy, Arpit Singh
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Patent number: 12664043Abstract: A method, computer program product, and computing system for receiving a telemetry data stream associated with a storage system. An erroneous portion of the telemetry data stream is identified by processing the telemetry data stream using an error detection process. The erroneous portion of the telemetry data stream is filtered by removing the erroneous portion of the telemetry data stream from the telemetry data stream.Type: GrantFiled: October 23, 2024Date of Patent: June 23, 2026Assignee: Dell Products L.P.Inventors: Shaul Dar, Arun Rameshbabu, Midhudev Kodiyath
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Patent number: 12657085Abstract: Disclosed herein is a method for managing memory in a memory disaggregation environment. The method includes handling a required subblock within a block more preferentially than an additional block in the event of a page fault and handling a page fault for the block in which the required subblock is preferentially processed.Type: GrantFiled: July 29, 2024Date of Patent: June 16, 2026Assignees: ELECTRONICS and TELECOMMUNICATIONS RESEARCH INSTITUTE, AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Tae-Hoon Kim, Kwang-Won Koh, Chang-Dae Kim, Eun-Ji Pak, Yeon-Jeong Jeong, Sang-Hoon Kim
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Patent number: 12656413Abstract: A safety mechanism circuit is provided. The safety mechanism circuit is disposed on a motherboard which includes a connector to be connected to a function circuit. In response to the function circuit being coupled to the connector, a detection circuit detects the voltage level of a contact terminal. In response to the voltage level of the contact terminal not being equal to a predetermined level, an operating circuit enters a safety mode to perform a safety operation. In response to the voltage level of the contact terminal being equal to the predetermined level, the operating circuit enters a normal mode to stop performing the safety operation.Type: GrantFiled: December 24, 2024Date of Patent: June 16, 2026Assignee: QUANTA COMPUTER INC.Inventors: Chih-Wei Yang, Chin-Yu Liu, Ming Hong Ni, Kung-Chang Chuang
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Patent number: 12639160Abstract: This disclosure is directed to a system for performing read error handling. The system reads a first portion of a memory block from a memory device and skips reading a second portion of the memory block when determining that a read bit error rate (RBER) associated with the second portion of the memory block transgresses an RBER threshold. The system, before initiating error correction operations on the second portion, continues to read additional portions of the memory block after determining that the RBER associated with the second portion of the memory block transgresses the RBER threshold and performs the error correction operations on the second portion using at least the first portion of the memory block and the additional portions of the memory block to correct the second portion of the memory block.Type: GrantFiled: November 21, 2024Date of Patent: May 26, 2026Assignee: Micron Technology, Inc.Inventor: Hanchao Chai