Patents Examined by Jason Byran
  • Providing an on-die logic analyzer (ODLA) having reduced communications
    Patent number: 8745455
    Abstract: In one embodiment, the present invention is directed to a logic analyzer such as may be implemented on a system-on-chip or another semiconductor device. The analyzer can include multiple lanes each having a filter to receive and filter debug data, a compressor to compress the debug data passed by the filter, a buffer, and a controller to store the compressed debug data into the buffer, where the compressed debug data can be stored without timing information. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: June 3, 2014
    Assignee: Intel Corporation
    Inventors: Ruben Ramirez, Michael J. Wiznerowicz, Sean T. Baartmans, Jason G. Sandri