Abstract: A first wireless control device may be associated with a second wireless control device in response to the movement of the first wireless control device in relation to the second wireless control device. The second control device may determine whether the signal strength of the wireless signals received from the first wireless control device has changed, and may associate the first wireless control device with the second wireless control device if the signal strength of the received wireless signals has changed. The second control device may be disassociated with the first control device by moving the first wireless control device in relation to the second wireless control device. The second control device may disassociate the first control device when the signal strength of subsequent wireless signals received from the first wireless control device has changed.

Abstract: An electric device, which includes a first switch-unit providing a first internal circuit signal, a first delay circuit unit outputting a second internal circuit signal which is generated by delaying the first internal circuit signal, a first AND logic outputting a first repair-signal generated by a logical AND operation between the first internal circuit signal and the second internal circuit signal, a first OR logic outputting a second repair-signal generated by a logical OR operation between the first internal circuit signal and the second internal circuit signal, and a second switch-unit selecting one of the first repair-signal and the second repair-signal according to a third internal circuit signal generated by an operation including a logical AND operation between the first repair-signal and the second repair-signal and providing the selected one as an output signal through an output terminal, is released.

Abstract: A reconfigurable, multi-core processor includes a plurality of memory blocks and programmable elements, including units for processing, memory interface, and on-chip cognitive data routing, all interconnected by a self-routing cognitive on-chip network. In embodiments, the processing units perform intrinsic operations in any order, and the self-routing network forms interconnections that allow the sequence of operations to be varied and both synchronous and asynchronous data to be transmitted as needed. A method for programming the processor includes partitioning an application into modules, determining whether the modules execute in series, program-driven parallel, or data-driven parallel, determining the data flow required between the modules, assigning hardware resources as needed, and automatically generating machine code for each module.

Abstract: Embodiments of the present invention are directed to an integrated drive and readout circuit assembly. Directional couplers are configured to connect to qubit-resonator systems. Diplexers are coupled to the directional couplers. A microwave signal combiner is coupled to the diplexers.

Abstract: A current-mode logic circuit is provided. The current-mode logic circuit includes a transmitter module. The transmitter module includes an output impedance circuit, a switch circuit, and a current source. The output impedance circuit provides an adjustable output resistor. The adjustable output resistor includes floating resistors and/or pull-up resistors. The switch circuit is coupled to the output impedance circuit. The switch circuit receives differential input signals, outputs differential output signals, and controls high-low level switching of the differential input signals and the differential output signals according to the adjustable output resistor. The current source is coupled to the output impedance circuit and the switch circuit. The current source provides currents to the output impedance circuit and the switch circuit.

Abstract: A power drawing device using a single live wire includes a first and second mechanical switches, and a power drawing circuit, wherein the first mechanical switch includes a first contact connected to a live wire, a third contact connected to a first light adjusting circuit, and a fifth contact connected to the first light adjusting circuit; the second mechanical switch includes a first contact connected to the live wire, a third contact connected to a second light adjusting circuit, a fifth contact connected to the second light adjusting circuit, and a sixth contact connected to the first mechanical switch; and the power drawing circuit includes a first terminal connected to the live wire, a second terminal connected to the second mechanical switch, a third terminal connected to the first light adjusting circuit, and a fourth terminal connected to the second light adjusting circuit.

Abstract: A control circuit for a semiconductor switching element includes a control terminal, a main electrode terminal, and a current sensing terminal, and controls the semiconductor switching element including a diode connected to the main electrode terminal or the current sensing terminal. The control circuit includes an overheat detection circuit, a current detection circuit, and an interruption circuit. The overheat detection circuit outputs an overheat detection signal when a temperature detected based on an output of the diode is equal to or higher than a predetermined set temperature. The current detection circuit outputs a current detection signal when an output value of the current sensing terminal is equal to or greater than a predetermined set current value. The interruption circuit turns off the semiconductor switching element when both the overheat detection signal from the overheat detection circuit and the current detection signal from the current detection circuit are input.

Abstract: A system may include an interface circuit and a plurality of wire buses electrically coupled with one another. The interface circuit may include transmitters which change states of the plurality of wire buses to transmit a plurality of multilevel symbols. The transmitters may drive wire buses, coupled to each other, to a termination voltage level.

Abstract: Lighting units, lighting systems, and methods are described herein for automatic and decentralized commissioning of a replacement lighting unit (140, 150, 250). In various embodiments, a replacement lighting unit may receive, from one or more remote lighting units over one or more communication networks, one or more identifiers associated with the one or more remote lighting units. The replacement lighting unit may also receive, from at least one of the one or more remote lighting units over the one or more communication networks, the lighting operation parameters associated with an inoperative lighting unit. The replacement lighting unit may then selectively energize one or more light sources (258) associated with the replacement lighting unit to emit light having one or more properties indicated in the lighting operation parameters associated with the inoperative lighting unit.

Abstract: The invention involves a kind of LED straight tube lamp and it falls into the field of lighting technology. The LED straight tube lamp includes a tube, lamp caps that come with contact pins and are located on both ends of the tube, a first rectifying unit and a second rectifying unit that are coupled with the pins on the two ends respectively, a filter unit, and a switch unit that's located between the rectifying unit and the filter unit. The switch unit has sampling end that is coupled with either or both pins. When the pin on either end of LED straight tube lamp is connected to a power supply, if the external impedance of the pin on the other end is equal to or higher than its set value, the switch unit will be disconnected; if it is lower than the set value, the switch unit will be closed.

Abstract: Methods and apparatus are described for providing and operating an efficient infrastructure to implement a built-in clock stop and scan dump (CSSD) scheme for fabric blocks, such as block random access memory (BRAM), UltraRAM (URAM), digital signal processing (DSP) blocks, configurable logic elements (CLEs), and the like. This is a very useful feature for system debug and can also be applied for emulation use cases (e.g., FPGA emulation). This scheme can be applied to any tiled architecture that has highly repetitive blocks. The infrastructure may include a DFx controller shared across multiple tiled blocks with some distributed logic in each block, in an effort to minimize or at least reduce area overhead. The infrastructure may also minimize or at least reduce utilization of fabric resources in an effort to ensure the least perturbation of the original design, such that the design issues being debugged can be easily reproduced.

Abstract: An approach is disclosed for generating seed electrons at a spark gap in the absence of 85Kr. The present approach utilizes the photo-electric effect, using a light source with a specific nominal wave length (or range of wavelengths) at a specific level of emitted flux to generate seed electrons.

Abstract: To provide an asynchronous circuit capable of power gating, a semiconductor device is configured with first to third terminals, a latch circuit, and a memory circuit. The third terminal outputs “false” when “false” is input to the first terminal and the second terminal. The third terminal outputs “true” when “true” is input to the first terminal and the second terminal. The third terminal outputs a truth value that is the same as the previous output, when “true” is input to one of the first terminal and the second terminal and “false” is input to the other of the first terminal and the second terminal. The memory circuit is capable of storing data stored in the latch circuit, while supply of a power supply voltage is stopped. The memory circuit includes a transistor that contains a metal oxide in a channel formation region.

Abstract: An apparatus includes a first switch and a first capacitor connected in series between a first voltage bus and a second voltage bus, a second capacitor and a second switch connected in series between the first voltage bus and the second voltage bus and a diode coupled between a common node of the first switch and the first capacitor, and a common node of the second capacitor and the second switch.

Abstract: A semiconductor device also includes programmable termination components and a calibration circuit. The calibration circuit generates impedance calibration codes. The calibration circuit also calibrates impedance of the programmable termination components based on an average impedance calibration code of the impedance calibration codes. The semiconductor device further includes an averaging circuit that determines the average impedance calibration code of the impedance calibration codes.

Abstract: This disclosure relates to leakage current reduction in integrated circuits (ICs). In one aspect, an IC can include a digital logic circuit and a polarization circuit. The digital logic circuit can have a plurality of inputs and can include a plurality of logic gates. The polarization circuit can receive a standby signal and a digital input signal comprising a plurality of bits. When the standby signal is deactivated, the polarization circuit can control the plurality of inputs of the digital logic circuit based on the digital input signal. However, when the standby signal is activated the polarization circuit can control the plurality of inputs of the digital logic circuit to a low power state associated with a smaller leakage current of the plurality of logic gates relative to at least one other state of the digital logic circuit.

Abstract: A variable brake light system that is within a vehicle with a brake pedal and includes a static brake light, multiple variable brake lights, and a control system. The control system is configured to turn on the static brake light when the brake pedal is activated. The control system is configured to change a display of the multiple variable brake lights according to an amount of activation of the brake pedal.

Abstract: A temperature-stabilized LED irradiance system is provided. The system includes an LED. A temperature sensor is disposed to sense a temperature proximate the LED. Circuitry coupled to the temperature sensor and the LED, is configured to adjust power to the LED based on the sensed temperature.

Abstract: A symmetry control circuit for a trailing edge phase control dimmer circuit for controlling alternating current (AC) power to a load, the symmetry control circuit including: a bias signal generator circuit configured to monitor non-conduction periods of each half cycle of said AC power for an elapsed duration of the non-conduction periods, and generate a bias signal voltage based on the elapsed duration, whereby an amplitude of the bias signal voltage is proportional to the elapsed duration of the non-conduction periods; and a bias signal converter circuit configured to convert the bias signal voltage to a bias signal current, wherein the bias signal current is added to a reference current of a conduction period timing circuit configured to determine said conduction periods, and wherein the conduction period timing circuit is configured to alter one of the conduction periods immediately following one of the non-conduction periods based on the bias signal current when added to the reference current to compensa

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to circuits with logical back-gate switching and methods of operation. The circuit includes at least one front-gate contact and digital back-gate potentials for logical function implementation on a back side of at least one device. The digital back-gate potentials are switchable between two logic levels.