Abstract: A method is provided for application of part flow model for a programmable logic controller logical verification system. The method includes the steps of constructing a part flow model, determining whether the part flow model is acceptable, and using the part flow model to test PLC code to build a manufacturing line.
Abstract: The present invention provides for simulating signal transitions. Circuit characteristics are generated. Circuit characteristics are loaded into memory. Circuit behaviour is simulated. A non-leading edge circuit transition is captured. This occurs in software.
Type:
Grant
Filed:
July 22, 2004
Date of Patent:
January 5, 2010
Assignee:
International Business Machines Corporation
Inventors:
Sang Y. Lee, Vasant B. Rao, Jeffrey Soreff, James Warnock, David Winston