Abstract: According to an embodiment, a method includes adjusting a reference generator into a first configuration based on a temporary trim value resulting, in a first reference voltage and a first reference current being generated for a first memory. The method further includes performing an integrity check on an initial set of data downloaded from the first memory based on the first reference voltage and the first reference current. The initial set of data includes a first trim value. The method further includes downloading contents from the first memory into a second memory in response to a successful integrity check after adjusting the reference generator into a second configuration. In the second configuration, the reference generator generates a second reference voltage and a second reference current for the first memory. The reference generator is adjusted by the first trim value in response to a successful integrity check.

Abstract: System and techniques for variable execution time atomic operations are described herein. When an atomic operation for a memory device is received, the run length of the operation is measured. If the run length is beyond a threshold, a cache line for the operation is locked while the operation runs. A result of the operation is queued until it can be written to the cache line. At that point, the cache line is unlocked.

Abstract: Methods, systems, and devices for data layout configurations for access operations are described. The memory system may write data to a first set of memory cells using a first write operation having a first type of layout for mapping the data to physical addresses of the memory system in response to receiving a write command. The first set of memory cells may be written to as single-level cells (SLCs), multi-level cells (MLCs), or triple-level cells (TLCs). The memory system may transfer the data to a second set of memory cells of the memory system using a second write operation having the first type of layout. The second set of memory cells may be written to as quad-level cells (QLCs). The memory system may read the data from the second set of memory cells using a read operation having a second type of layout different than the first type of layout.

Abstract: A method, computer program product, and computing system for generating a plurality of page buffers from a log memory system of the storage system using a persistent memory organization policy. A plurality of physical layer blocks (PLBs) are generated from the log memory system using the persistent memory organization policy. A set of page buffers are allocated from the plurality of page buffers to a first mapping page of a plurality of mapping pages. A PLB is allocated from the plurality of PLBs to a second mapping page of the plurality of mapping pages. One or more IO requests are processed using one or more of the first mapping page and the second mapping page.

Abstract: Disclosed is a memory device which includes a first memory cell that is electrically connected with a first word line and a first bit line, a first bit line sense amplifier circuit that is electrically connected with the first bit line, a first local sense amplifier circuit that is electrically connected with the first bit line sense amplifier circuit through a first local input/output line, a first local driver that is electrically connected with the first local sense amplifier circuit through a first pre-global input/output line, and a sense amplifier and write driver that is electrically connected with the first local driver through a global input/output line, and the first local driver selectively electrical-disconnects the first pre-global input/output line from the global input/output line, based on an operation for the first memory cell.

Abstract: Key-value data is processed. An example method includes acquiring key-value data, including key data and value data, and a storage level corresponding to the key-value data and indicating a storage performance level of a memory in a storage system. In response to the storage level being a first level higher than a second level, the key-value data is stored in a primary storage tree in a first memory. In response to the storage level being the second level, the key data is stored in the primary storage tree, and the key-value data is stored in a secondary storage tree in a second memory. Beneficially, associations can be established between different memories in the storage system through the key data using fast positioning of all the key-value data implemented through memories with high storage performance. Further, the efficiency of data processing in the storage system is thereby improved.

Abstract: A processing device in a memory sub-system performs a first media scan operation with respect to a plurality of memory pages addressable by the ordinary wordline, wherein each page of the plurality of memory pages is contained by a respective management unit, and responsive to determining that a value of a data state metric of a memory page of the plurality of memory page addressable by the ordinary wordline satisfies a specified condition, performs a first media management operation with respect to a management unit containing the memory page.

Abstract: A data processor is adapted to couple to a memory. The data processor includes a memory operation array, a power engine, and an initialization circuit. The memory operation array includes a command portion and a data portion. The power engine has an input for receiving power state change request signals and an output for providing memory operations responsive to instructions stored in the command portion. The initialization circuit populates the data portion such that consecutive memory operations are separated by an amount corresponding to a predetermined minimum timing parameter.

Abstract: An information processing method, which is executed by a computer, includes detecting a first state in which an object is separated from an operation surface by a prescribed distance, detecting a second state in which the object comes in contact with the operation surface after the first state is detected, executing a first process which includes reading data from a first storage device and loading, into a second storage device, the data that are read, in response to the detecting of the first state, and executing a second process with respect to the data loaded into the second storage device, in response to the detecting of the second state.

Abstract: The operational performance and the I/O performance of Snapshots in a storage system are balanced. In a storage system, meta information of data appended to a log structured area is composed of meta information of a first tier and meta information of a second tier which correlate location information of data in a logical volume and location information of data in the log structured area. When creating a snapshot of the logical volume, a data management unit creates, in the same meta information area as a replication source, a replication of the meta information of the first tier stored in a plurality of meta information areas assigned to a plurality of controllers. A data control unit accesses the data of the log structured area from the logical volume, and accesses the data of the log structured area from the snapshot.

Abstract: Computer-implemented methods for optimizing memory access for systems with memory expanders are provided. Aspects include analyzing a source code of a program to identify each data structure that will be accessed by the program during execution of the program, determining a predicted access pattern for each data structure, and determining a type of each data structure. Aspects also include calculating a data access score for each data structure based at least in part on the predicted access pattern and the type and creating an executable code of the program based on the source code. The executable code includes a memory allocation value for each data structure that is determined based on the data access score for each data structure.

Abstract: One example method includes copying selected backup data from a secondary storage system to a provisioned primary storage volume, creating a snapshot of the primary storage volume, using the snapshot to create a thin clone volume, masking the thin clone volume, and mounting the thin clone volume, and recovering the backup data from the thin clone volume. The recovered backup data may be made available to a secondary workload that includes an enterprise application.

Abstract: A system claims ownership of a shared mailbox, and configures the shared mailbox as a redundant array of independent drives (RAID) controller. The system creates a RAID volume from at least one non-volatile memory express drive, and exposes the RAID volume during a boot process to a basic input/output system.

Abstract: A system and method for system and method for managing sorted keys in a persistent memory system. In some embodiments, the method includes adding a key to a sorted set of keys. The adding may include: identifying a bin, in a key map, corresponding to the key; and adding the key to a subset of keys associated with the bin, the subset of keys being stored in persistent memory.

Abstract: Techniques for updating sparse metadata in a metadata delta log (MDL)-based storage system. The techniques include providing a 3-level MDL, which includes a first level for a first set of buckets initially (and temporarily) designated as “active”, a second level for a second set of buckets initially (and temporarily) designated as “de-staging”, and a third level for a third set of buckets designated as “base”. The techniques include receiving delta updates of space accounting (SA) statistics at buckets of the active set, in which the SA statistics are associated with IDs from a large sparse ID space. The techniques include, once the buckets of the active set are full, switching the “active” and “de-staging” designations of the first and second sets of buckets, respectively, and de-staging and merging, bucket-by-bucket, the SA delta updates contained in the de-staging set with any SA delta updates contained in the base set.

Abstract: A method including updating memory allocation information of a UVM based on block information of model data blocks used for an execution of a deep learning model by a deep learning framework, and performing a least recently used (LRU) eviction based on the updated memory allocation information.

Abstract: In some implementations, an integrated circuit may receive a read command associated with a data structure of the integrated circuit. The integrated circuit may determine that requested data, of the data structure and associated with an element within the data structure, is not ready for reading. The integrated circuit may output, based on determining that the requested data is not ready for reading, generated delay data. The integrated circuit may determine that the requested data, of the data structure and associated with the element, is ready for reading. The integrated circuit may output, based on determining that the data is ready for reading, the requested data.

Abstract: A data storage device and method for accident-mode storage of vehicle information are disclosed. In one embodiment, a data storage device is provided comprising a memory and one or more processors. The memory comprises single-level cell (SLC) memory and multi-level cell (MLC) memory. The one or more processors, individually or in combination, are configured to: receive a command from a vehicle to enter accident mode; and in response to receiving the command from the vehicle to enter accident mode, relocate vehicle information stored in the MLC memory to the SLC memory. Other embodiments are disclosed.

Abstract: A memory controller includes a command/address generation module; and a row-hammer tracking module configured to track a row-hammer address based on an active command and an address for a target bank and a target row indicated by the active command, the active command and the address being received from the command/address generation module, wherein the row-hammer tracking module includes: a plurality of storage devices each including fields corresponding to banks, each of the fields storing candidate addresses and access counting values for the candidate addresses; and at least one search controller configured to sequentially search, according to a clock, fields of the plurality of storage devices corresponding to the target bank when the active command is input, and search, during one clock, fields of the plurality of storage devices corresponding to different banks based on active commands indicating the different banks.

Abstract: Techniques for extending a truth table of a stacked memory system are provided. In an example, a storage system can include a stack of first memory die configured to store data and a logic die. The logic die can include an interface circuit configured to receive multiple memory requests from an external host using a first command bus, a second command bus, and a data bus, and a controller configured to interface with the stack of first memory die to store and retrieve the data from the stack of first memory die. The logic die can include a second memory having a faster access time than devices of the stack of first memory die, and the interface circuit can directly access the second memory in response to a first memory request of the multiple of memory requests.