Abstract: Examples include a processor including a coherency mode indicating one of a directory-based cache coherence protocol and a snoop-based cache coherency protocol, and a caching agent to monitor a bandwidth of reading from and/or writing data to a memory coupled to the processor, to set the coherency mode to the snoop-based cache coherency protocol when the bandwidth exceeds a threshold, and to set the coherency mode to the directory-based cache coherency protocol when the bandwidth does not exceed the threshold.

Abstract: In one embodiment, a method for predicting false sharing includes running code on a plurality of cores and determining whether there is potential false sharing between a first cache line and a second cache line, and where the first cache line is adjacent to the second cache line. The method also includes tracking the potential false sharing and reporting the potential false sharing.

Abstract: Providing dynamic determination of memory attributes in processor-based systems is disclosed. In this regard, in some aspects, a processor-based system comprises a processor device and one or more memory devices, each of which is associated with one of a plurality of memory attributes. The processor device transmits a request to one of the memory devices to determine the memory attribute associated with the memory device. In response to the request, the memory device provides a memory attribute indication that informs the processor device of the memory attribute associated with the memory device. The processor device in some aspects then performs subsequent memory access operations on the memory device based on the memory attribute indication. Some aspects may provide that the processor device also stores the memory attribute indication, and performs subsequent memory access operations based on the stored memory attribute indication.

Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.

Abstract: Systems and methods of deduplication aware scalable content placement are described. A method may include receiving data to be stored on one or more nodes of a storage array and calculating a plurality of hashes corresponding to the data. The method further includes determining a first subset of the plurality of hashes, determining a second subset of the plurality of hashes of the first subset, and generating a node candidate placement list. The method may further include sending the first subset to one or more nodes represented on the node candidate placement list and receiving, from the nodes represented on the node candidate placement list, characteristics corresponding to the nodes represented on the candidate placement list. The method may further include identifying one of the one or more nodes represented on the candidate placement list in view of the characteristic and sending the data to the identified node.

Abstract: Techniques for controlling access to a memory are provided. The techniques may include receiving and storing output pixel data in a buffer, providing the stored output pixel data to a display controller, receiving stored output pixel data from the buffer at the display controller, switching to a second operating mode state based at least on an amount of available data in the buffer being less than or equal to a threshold, identifying a portion of the image data stored in a memory device for use in generating output pixel data for an updated image, and, in response to operating in the second operating mode, generating the output pixel data without issuing a memory read command via an interconnect to retrieve the portion of the initial image while operating in the second operating mode, and providing the output pixel data to the buffer.

Abstract: The disclosed computer-implemented method for enabling safe memory de-duplication in shared-computing environments may include (i) identifying a first virtual machine and a second virtual machine, (ii) calculating a trustworthiness score for the first virtual machine based on a trustworthiness score of each binary of the first virtual machine, (iii) calculating a trustworthiness score for the second virtual machine based on a trustworthiness score of each binary of the second virtual machine, and (iv) enabling the first virtual machine and the second virtual machine to share a page frame of physical memory by assigning, based on the trustworthiness scores of the first virtual machine and the second virtual machine being above a predetermined threshold, the first virtual machine and the second virtual machine to a trusted group of virtual machines that can share physical memory. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A cache repair tool includes an interface, a monitoring engine, and a purging engine. The interface receives a request to repair a cache. The request includes a maximum size threshold less than a total storage capacity of the cache. The request includes an identification of a data type. The monitoring engine determines an available capacity of the cache. The monitoring engine determines that the available capacity is less than or equal to the maximum size threshold. The purging engine purges data of the identified data type from the cache in response to the determination that the determined size exceeds the maximum size threshold.

Abstract: Operation of a multi-slice processor that includes a plurality of execution slices. Operation of such a multi-slice processor includes: determining, by a hypervisor, that consumption of memory controller resources, by a plurality of processing threads, is above a threshold quantity, wherein respective processing threads of the plurality of processing threads control respective prefetch settings; and responsive to determining that the consumption of the memory controller resources is above the threshold quantity, modifying individual memory controller usage of at least one of the plurality of processing threads such that the consumption of the memory controller resources is reduced below the threshold quantity.

Abstract: A data storage device includes a nonvolatile memory device including a plurality of memory blocks each of which includes a plurality of pages; and a controller suitable for obtain block physical to logical (P2L) data corresponding to a first memory block among the plurality of memory blocks, determine first and second target logical to physical (L2P) pages, one or more first target L2P segments stored in the first target L2P page and one or more second target L2P segments stored in the second target L2P page, based on the block P2L data and an L2P segment position table, obtain the first target L2P segments, and verify validity for one or more first P2L data included in the block P2L data, based on the first target L2P segments, wherein the controller obtains the second target L2P segments while verifying the validity for the first P2L data.

Abstract: An application within a virtual machine is an iSCSI Initiator and is allowed to use as an iSCSI Target another virtual machine within the same hypervisor in order to make a persistent reservation for a virtual disk within a remotely-located storage platform. Any number of virtual machines within different hypervisors, and perhaps on different computers, use a local controller virtual machine to make a persistent reservation for the same virtual disk. The registration list and the current reservation holder data for an iSCSI persistent reservation for a particular virtual disk are held on a storage node of the storage platform rather than within a single virtual machine of a remote computer. A metadata module on the storage platform handles the incoming requests. A coordinator module within the storage platform uses a lock mechanism to guarantee that the reserve, release, preempt and clear commands are handled properly.

Abstract: An information management system according to certain aspects may determine whether snapshot operations will work prior to executing them. The system may check various factors or parameters relating to a snapshot storage policy to verify whether the storage policy will work at runtime without actually executing the policy. Some examples of factors can include: availability of primary storage devices for which a snapshot should be obtained, availability of secondary storage devices, license availability for snapshot software, user credentials for connecting to primary and/or second storage devices, available storage capacity, connectivity to storage devices, etc. The system may also check whether a particular system configuration is supported in connection with snapshot operations. The result of the determination can be provided in the form of a report summarizing any problems found with the snapshot storage policy.

Abstract: A computing system includes a host processor, an access processor having a command port, a near memory accelerator, and a memory unit. The system is adapted to run a software program on the host processor and to offload an acceleration task of the software program to the near memory accelerator. The system is further adapted to provide, via the command port, a first communication path for direct communication between the software program and the near memory accelerator, and to provide, via the command port and the access processor, a second communication path for indirect communication between the software program and the near memory accelerator. A related computer implemented method and a related computer program product are also disclosed.

Abstract: Ternary content addressable memory (TCAM) structures and methods of use are disclosed. The memory architecture includes one or more ternary content addressable memory (TCAM) fields, and control logic that applies progressively discriminating data-masking and scores a closeness of a match based on matched and mismatched bits.

Abstract: A computing system includes a host processor, an access processor having a command port, a near memory accelerator, and a memory unit. The system is adapted to run a software program on the host processor and to offload an acceleration task of the software program to the near memory accelerator. The system is further adapted to provide, via the command port, a first communication path for direct communication between the software program and the near memory accelerator, and to provide, via the command port and the access processor, a second communication path for indirect communication between the software program and the near memory accelerator. A related computer implemented method and a related computer program product are also disclosed.

Abstract: A memory mapping management method for a system using nonvolatile memory (NVM) as main memory, including receiving a request to cancel a memory mapping, determining whether the memory mapping is a mapping of a file based on meta data relating to the memory mapping, separately storing the meta data when the memory mapping is the mapping of the file, and cancelling the memory mapping when the memory mapping is not the mapping of the file may be provided. Further, the memory mapping management method may include receiving a memory mapping request, searching for a memory mapping for a file in a memory mapping storage space when a requested memory mapping is a mapping of the file, and reusing a searched memory mapping found during the search when a region of the searched memory mapping includes a region required by the requested memory mapping in a virtual address space.

Abstract: Cache prefetching in offloaded data transfer (ODX) processes. A populate token command is received to initiate a copy offload operation. Responsive to receiving the populate token command, a cache of a data storage system in a storage area network environment is instructed to prefetch data in accordance with the populate token command and complete an offloaded read request. Responsive to determining that a write using token command is not received within a specified time duration, the prefetched data stored in the cache is evicted.

Abstract: Implementations disclosed herein include a method comprising detecting a workload request from a host, estimating a media cache fill-up rate based on the detected workload request, estimating a current media cache usage, predicting, based on the detected workload request, the estimated media cache fill-up rate and the estimated current media cache usage, a workload profile, and determining a preemptive media cache cleaning strategy based on the predicted workload profile.

Abstract: Methods, devices and systems are provided for making a shingled magnetic recording (SMR) hard disk drive operate with similar random access characteristics of a conventional hard drive despite the SMR disk having strict sequential write requirements. A virtual space manager manages a virtual address space, which is visible to a host system, and maps virtual addresses to logical addresses on the SMR disk. A logical space manager controls the placement of data on the SMR disk and ensures that writes to the disk comply with the sequential write requirements. The disk is subdivided into a plurality of stripes each comprising one or more blocks. When a block located within a stripe is to be rewritten with new data, the entire stripe is read from the SMR disk into a memory of the system, the stripe is modified in the memory to replace the previous data stored in the block with the new data, and the modified stripe is written to a new, next available stripe on the disk.

Abstract: A system and method for efficiently replicating data stored in a byte-addressable, persistent memory of a host computer. A user-level library of the host computer may configure the persistent memory as a software transactional memory (STM) system defined by operations, such as a STM commit operation, that ensure safe and consistent storage of the data within a region of the persistent memory. The library may then cooperate with an application executing on the host computer to control access to the data, e.g., to change the data, as a transaction using the STM commit operation. Within a context of the transaction, the library may precisely determine which bytes of the data have changed within the region, as well as how and when the data bytes have changed. Armed with precise knowledge of the context of the transaction, the library may efficiently replicate the changed data at the byte-addressable granularity.