Patents Examined by Jean Bolte Flelirantin
  • Patent number: 6182081
    Abstract: The present invention protects a computer user from exposure to offensive materials from the Internet or other sources, by allowing a user without any computer knowledge or experience to determine if the computer has been exposed to offensive materials. The present invention does not require any installation and does not leave any recognizable traces of it being executed. It collects all the viewable files and all files having offensive words, based on a pre-compiled list, in them and allows the user to review and delete these files. The files are collected from all directories on the attached computer disks without regard to their access control status, e.g., hidden and files marked deleted are collected as well.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: January 30, 2001
    Inventors: Bo Dietl, Edward Warman, Sajay Balan, Oleg Rybalko
  • Patent number: 6016532
    Abstract: A microprocessor is configured to generate help instructions in response to a data cache miss. The help instructions flow through the instruction processing pipeline of the microprocessor in a fashion similar to the instruction which caused the miss (the "miss instruction"). The help instructions use the source operands of the miss instruction to form the miss address, thereby providing the fill address using the same elements which are used to calculate cache access addresses. In one embodiment, a fill help instruction and a bypass help instruction are generated. The fill help instruction provides the input address to the data cache during the clock cycle in which the fill data arrives. The appropriate row of the data cache is thereby selected for storing the fill data. The bypass help instruction is dispatched to arrive in a second pipeline stage different from the stage occupied by the fill help instruction.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: January 18, 2000
    Assignee: Sun Microsystems, Inc.
    Inventors: William L. Lynch, Gary R. Lauterbach
  • Patent number: 5995963
    Abstract: A collating apparatus generates a sparse state transition table by reducing the amount of data indicating a specific transition operation and a shift operation in a state transition table in which a collating operation corresponding to each symbol contained in one or more retrieval keys is defined. Then, the collating apparatus stores the table after compressing it into an array format, and retrieves the keys in the file to be retrieved while referring to the compressed state transition table. This collating apparatus is applied to a word processor, database system, full-text search system, etc.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: November 30, 1999
    Assignee: Fujitsu Limited
    Inventors: Isao Nanba, Nobuyuki Igata