Abstract: The present invention provides a display device comprising a display having an arrangement of a plurality of pixels, a drive IC for supplying to each pixel of the display data voltage or data current corresponding to a video signal fed from the outside, comparing/calculating unit for supplying the video signal to the drive IC, and a current monitor unit for measuring the total quantity of currents to have been passed through a plurality of pixels of the display. The comparing/calculating unit derives the sum of currents to be passed through each pixel of the display based on the values of the video signals for each pixel of the display, to correct the video signals for each pixel of the display based on the derived value and measurement value obtained by the current monitor unit.

Abstract: The disclosure teaches using at least two orthogonal arrays of complicated shaped glass rods or very large fibers-like structures (from here in referred to as fibers) with wire electrodes to fabricate plasma displays with plasma cells larger than 0.05 mm3 in volume. (The volume of a plasma cell is defined by the width of the plasma channel times the height of the plasma channel times the pitch of the pair of sustain electrodes.) To increase the size of the bottom fiber and keep the addressing voltage constant or to reduce the addressing voltage, the address electrode is moved from the bottom of the channel up into the barrier rib. Moving the address electrode up into the barrier rib will reduce the distance, d, between the address electrode and the sustain electrodes, thus increasing the electric field of the addressing pulse.

Abstract: An AMEL display is formed and operated in a manner to provide enhanced gray scale or color operation. The AMEL display is operated over consecutive illumination frames which are partitioned into a plurality of passes. The desired illumination intensity for a given pixel during each illumination frame is determined and the pixel is activated for a substantially equal duration in each pass to provide the desired illumination level for each frame. Each pass has an associated illumination profile signal composed of a plurality of discrete steps for selectively passing a number of illumination pulses to each active EL cell in the display in accordance with a pixel activation voltage loaded into each active EL cell. The pixel activation voltage and illumination profiles cooperate to distribute the number of illumination pulses in a substantially equal fashion in each pass of an illumination frame. Pixel driver circuits are disclosed for operating the pixel in accordance with the disclosed illumination methods.

Abstract: A data processing apparatus of an alternating current type plasma display panel system is disclosed. A plasma panel is divided into four subpanels by dividing vertically and horizontally, and 4 data interfacing sections take charge of driving the 4 subpanels, respectively. Numbers of upper and lower address electrodes are P. Each of the four data interfacing sections repeatedly receives N bits red-green-blue (RGB) data S times from a frame memory and, after storing a horizontal line RGB data, transfers D bits RGB data a time into 4 driving IC sections for driving address electrodes in a suitable order for data processing. Each of two driving IC sections for upper right and lower right subpanels takes charge of driving R address electrodes, and each of two driving IC sections for upper left and lower left subpanels takes charge of driving P-R address electrodes, where the number R can be decided by an equation, R=N.times.

Abstract: When the ball of a mouse is rotated, an up/down counter outputs a count N according to the direction of rotation and the amount of rotation. A controller compresses the count N to seven-bit data according to a conversion table. The controller also attaches L-button data indicating the state of the L button of the mouse to the most significant bit of the compressed seven-bit data. Then, the controller changes the bit positions of the eight-bit data, and reverses each bit value. The eight-bit data to be transferred has been thus completed. The controller sends bit by bit in series the data from a lower bit to a signal processing unit.