Abstract: A verifiable holographic article comprises a substrate comprising (a) at least one hologram; and (b) at least one covert image that is convertible to an overt image using a decoding sampling device, e.g., a photocopier, that produces an aliasing or moire effect. The article cost-effectively provides both “first line” and “second line” security features and can be easily, quickly, and safely verified or authenticated.
Abstract: Multiple cryptographic algorithms are utilized on a single integrated circuit. In a single special memory, a plurality of values are stored. The values are used for a first cryptographic algorithm and are used for a second cryptographic algorithm. At least one value from the plurality of values is used both for the first cryptographic algorithm and for the second cryptographic algorithm. When performing a first operation for the first cryptographic algorithm, first values from the plurality of values are used. The first values include the value used both for the first cryptographic algorithm and for the second cryptographic algorithm. When performing a second operation for the second cryptographic algorithm, second values from the plurality values are used. The second values also include the value used both for the first cryptographic algorithm and for the second cryptographic algorithm.
Type:
Grant
Filed:
June 29, 1998
Date of Patent:
September 11, 2001
Assignee:
VLSI Technology, Inc.
Inventors:
Gregory Clayton Eslinger, Joseph Victor Wallace