Abstract: An organic light emitting diode display and a fabricating method thereof are disclosed. Embodiments provide an organic light emitting diode display and a fabricating method thereof which prevents a pixel and a driver included in the organic light emitting diode display from being damaged due to an electrostatic discharge by forming a protective layer along at least one edge region of a substrate having a pixel region and a non-pixel region.

Abstract: An electro-optical device includes a plurality of data lines, a plurality of scanning lines, a plurality of unit circuits that are provided in correspondence with intersections of the data lines and the scanning lines. Each of the data lines is supplied with a data voltage in accordance with a gray-scale level. Each of the scanning lines is supplied with a scanning signal that specifies a writing period during which the data voltage is being written into the corresponding unit circuits. Each of the plurality of unit circuits includes a driving transistor, an electro-optical element, a capacitive element, a power feed line, a first switching element and a second switching element. The driving transistor generates a driving current in accordance with an electric potential of a gate thereof. The electro-optical element generates light with a gray-scale level in accordance with the driving current that is generated by the driving transistor.

Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently by turns, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.

Abstract: A light emission control device has a drive current feeder supplying a drive current to a light-emitting element, a drive current controller controlling the current level of the drive current based on the number of pulses in an enable signal, and a resetter resetting the controlling of the current level of the drive current when the enable signal has remained in a predetermined logic state for a predetermined period. Thus configured, the light emission control device allows its turning-on and -off and drive current level to be controlled with a single-line interface.

Abstract: A method of forming a liquid crystal display includes determining an illuminant blue peak wavelength, an illuminant green peak wavelength, and an illuminant red peak wavelength, and assembling a liquid crystal display with a blue light reflecting liquid crystal layer having a blue peak reflection wavelength being a shorter wavelength than the illuminant blue peak wavelength, and a green light reflecting liquid crystal layer having a green peak reflection wavelength substantially equal to or longer than the illuminant green peak wavelength, and a red light reflecting liquid crystal layer having a red peak reflection wavelength being a longer wavelength than the illuminant red peak wavelength. Liquid crystal displays are also described.

Abstract: A touch screen controller circuit (1A) including means for generating a first and second levels of a pen touch signal (PENTOUCH) if a touch point (Q) is present or absent, respectively. A clock start signal (CLKSTART) is generated in response to the first level. An internal clock signal (INTCLK) is generated in response to the clock start signal. First and second levels of a synchronized pen touch signal (PENTOUCH1) corresponding to the first and second levels, respectively, of the pen touch signal are generated in response to the internal clock signal. A stop clock signal (CLKSTOP) is generated in response to the second level of the synchronized pen touch signal. The internal clock signal (INTCLK) is stopped in response to the clock stop signal.

Abstract: The present invention relates to a dual type flat panel display device and a flexible printed circuit board that is integrated to simultaneously transfer electric signals to both of a light source device and a main display panel. According to one aspect of the present invention, the first flexible printed circuit board includes a first substrate portion, a second substrate portion, a third substrate portion, and a connection substrate portion. The first substrate portion is connected to a main display panel. The second substrate portion is disposed between the main display panel and a backlight unit, and is connected to the first substrate portion. The second substrate portion includes a light source device to transmit light into the backlight unit. The third substrate portion is disposed between the backlight unit and the printed circuit board, and is connected to the printed circuit board. The connection substrate portion connects the second substrate portion to the third substrate portion.

Abstract: The present invention provides a novel technique for reducing the effect of CMI for PPM UWB signals. The system and method in accordance with the present invention greatly improves the performance of receivers and eliminates the possibility of catastrophic errors. The proposed technique introduces a variable modulation index instead of a fixed modulation index as was previously known in the art. The modulation index is changed over each frame within each symbol. In other words, a time hopping modulation index sequence is used over the frames of the UWB symbols in accordance with the present invention.

Abstract: In a method for reducing electromagnetic interference in a clocked circuit, the clock circuit includes at least a first clock signal and a second clock signal. The method detects when a first transition of the first clock signal is substantially aligned with a corresponding second transition of the second clock signal. The second clock signal is delayed by a predetermined amount of time when the first transition is substantially aligned with the second transition.