Patents Examined by Jeffrey Gblende
  • Patent number: 11881846
    Abstract: To prevent deterioration of current detection accuracy due to a difference in deterioration between a main MOS and a sense MOS. The load drive device includes a main MOS (101) for supplying a load current to a load, a sense MOS (102) to be used for detection of the load current, and an equalizer circuit (110) and a switch (120) which are provided in parallel between the source terminal of the main MOS and the source terminal of the sense MOS. The drain terminal of the main MOS and the drain terminal of the sense MOS have a common connection, and when a current is detected, the terminal voltage of the main MOS and the terminal voltage of the sense MOS are equalized by the equalizer circuit, and the switch is opened. When a current is not detected, the equalizer circuit is stopped and the switch short-circuits the source terminal of the main MOS and the source terminal of the sense MOS.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: January 23, 2024
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Keishi Komoriyama, Yoichiro Kobayashi
  • Patent number: 11881772
    Abstract: A power supply device includes a power supply circuit configured to output different voltages to a plurality of output lines, a plurality of capacitors provided in correspondence with the plurality of output lines, one end of each of the plurality of capacitors being coupled to a corresponding output line of the plurality of output lines and an other end thereof being coupled to a ground potential, a plurality of diodes provided in correspondence with the plurality of output lines, anodes of the plurality of diodes being coupled to the corresponding output lines and cathodes thereof being commonly coupled, and a discharge resistor coupled to the cathodes of the plurality of diodes.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: January 23, 2024
    Assignee: FUJITSU LIMITED
    Inventors: Tatsuo Araki, Susumu Eguchi, Hironobu Kageyama, Takashi Satou
  • Patent number: 11881782
    Abstract: Multi-level DC-to-DC converter circuits and methods that permit a full range of output voltages, including near and at zone boundaries. Embodiments alternate among adjacent or near-by zones, operating in a first zone for a selected time and then in a second zone for a selected time. Embodiments may include a parallel capacitor voltage balancing circuit that connects a capacitor to a source voltage to charge that capacitor, or couples two or more capacitors together to transfer charge, all under the control of real-time capacitor voltage measurements. Embodiments may include a lossless voltage balancing solution where out-of-order state transitions are allowed, thus increasing or decreasing the voltage across specific capacitors to prevent voltage overstress on the converter main switches. Restrictions may be placed on the overall sequence of state transitions to reduce or avoid transition state toggling, allowing each capacitor an opportunity to have its voltage steered as necessary for balancing.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: January 23, 2024
    Assignee: pSemi Corporation
    Inventors: Gary Chunshien Wu, David M. Giuliano, Gregory Szczeszynski
  • Patent number: 11876450
    Abstract: According to one embodiment, an electronic circuit includes: a first circuit configured to generate a first current and output a first voltage, the first voltage being one of a voltage based on the first current and a first predetermined voltage; a second circuit configured to generate a first output current based on the first voltage; a first output terminal outputting the first output current to a first switching device; a first input terminal having a first input signal inputted, the first input signal relating to driving and non-driving of the first switching device; and a third circuit configured to generate a first control signal based on the first input signal, the first control signal switching the first voltage to the first predetermined voltage and stopping the first current.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: January 16, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Takeshi Ueno
  • Patent number: 11876448
    Abstract: A booster circuit includes a boost converter configured to boost an input voltage and performs feedback control such that an output voltage becomes a set value on the basis of a voltage applied to a feedback terminal and an internal feedback reference voltage, a power supply unit configured to generate a reference voltage with a smaller error than the feedback reference voltage, and a control unit configured to compare a voltage corresponding to the output voltage of the boost converter with the reference voltage, and configured to output a control signal indicating a comparison result to the feedback terminal of the boost converter.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: January 16, 2024
    Assignee: Yokogawa Electric Corporation
    Inventors: Taisuke Abe, Takeki Satou, Takumi Sakurai
  • Patent number: 11874681
    Abstract: The present invention relates to an apparatus for maximizing the power of a multi module solar string power generation system, comprising an Injection Circuit (IC), connected to a DC bus and to a string of solar panels, wherein the IC is also connected to at least one separated solar panel of the string. The IC regulates the power production of the connected string and utilizes the excess power to the solar inverter. The IC comprises: (i) a first MPPT mechanism, for finding the MPP of the string; (ii) a second MPPT mechanism, for finding the MPP of the separated panel; (iii) a first DC/DC converter, for converting some of the power, from the separated panel, to regulating power for the connected string; and (iv) a second DC/DC converter, for converting and utilizing, the excess power from the separated panel, to the solar inverter using the DC bus.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: January 16, 2024
    Assignee: SOLAD—SOLAR ELECTRONICS LTD.
    Inventors: Ilya Nemenman, Shlomo Adler, Evsei Berman
  • Patent number: 11870346
    Abstract: A DC-DC converter includes: a first capacitor, a second capacitor, a first switch device, a second switch device, a third switch device, a fourth switch device, a flying capacitor, where one end of the flying capacitor is coupled to the first intermediate node, the other end of the flying capacitor is coupled the second intermediate node; and the protective circuit, including a clamping unit and a buffering unit, where when a voltage between the positive end of the bus and the negative end of the bus increases, the clamping unit clamps the first switch device to a voltage of the first capacitor, and clamps the fourth switch device to a voltage of the second capacitor, and the buffering unit reduces a current flowing through the clamping unit and the flying capacitor.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: January 9, 2024
    Assignee: HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.
    Inventors: Dong Chen, Lei Shi, Zhaohui Wang
  • Patent number: 11870361
    Abstract: The present disclosure relates to solutions for operating a flyback converter comprising an active clamp. The flyback converter comprises two input terminals and two output terminals. A first electronic switch and the primary winding of a transformer are connected in series between the input terminals. An active clamp circuit is connected in parallel with the primary winding. The active clamp circuit comprises a series connection of a clamp capacitor and a second electronic switch. A third electronic switch and the secondary winding of the transformer are connected in series between the two output terminals. In particular, the present disclosure relates to solutions for switching the first, second and third electronic switch in order to achieve a zero-voltage switching of the first electronic switch.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: January 9, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Bianco, Francesco Ciappa, Giuseppe Scappatura
  • Patent number: 11864862
    Abstract: A framework for power management. The framework includes at least one power distribution board disposed within a radio-frequency (RF) cabin of a medical imaging system and coupled to an external reference clock. The power distribution board may include a clock circuit that generates one or more output clock signals based on a reference clock signal from the external reference clock. One or more switching regulators may be coupled to the clock circuit. The one or more switching regulators may be synchronized to the one or more output clock signals and provide power to one or more endpoint loads.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: January 9, 2024
    Assignee: Siemens Medical Solutions USA, Inc.
    Inventors: Andrew Philip Moor, Nan Zhang, Martin Judenhofer, Ziad Burbar
  • Patent number: 11870341
    Abstract: An isolated power converter package includes a leadframe including a first and second die pad, first and second supports connected to first leads, second leads. A first semiconductor die is on the first die pad and a second semiconductor die is on the second die pad. The molded transformer includes a top and bottom side magnetic sheet each having a magnetic mold material including magnetic particles in a second dielectric material on respective sides of a laminate substrate including a dielectric material and a first coil and a second coil that each include a coil contact. Edges of the laminate substrate are on the supports. Bond wires are between the first die bond pads and the second leads, between the second die bond pads and the second leads, between the first die bond pads and coil contacts, and between the second die bond pads and the coil contacts.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: January 9, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yi Yan, Vivek Arora
  • Patent number: 11862996
    Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: January 2, 2024
    Assignee: Navitas Semiconductor Limited
    Inventors: Daniel M. Kinzer, Santosh Sharma, Ju Jason Zhang
  • Patent number: 11863073
    Abstract: A DC-DC converter includes an output terminal, a reference voltage source, an error amplifier, and a compensation circuit. The error amplifier is coupled to the output terminal and the reference voltage source. The error amplifier is configured to generate an error signal representative of a difference between a voltage at the output terminal and a reference voltage provided by the reference voltage source. The compensation circuit is coupled to the error amplifier. The compensation circuit includes a resistor, a capacitor, and a switch control circuit. The resistor is coupled to the error amplifier. The capacitor is coupled to the resistor. The switch control circuit is configured to modulate connection of the resistor to the capacitor based on a switching frequency of the DC-DC converter.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: January 2, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Narayanan Seetharaman, Julian Leonhard Becker Ferreira, Puneet Sareen, Stefan Dietrich
  • Patent number: 11855524
    Abstract: A gate driver circuit comprises an auxiliary winding, a voltage summer, an auxiliary voltage bus, a gate driver integrated circuit (IC), and a controller. The auxiliary winding is positioned adjacently to the inductor and configured to inductively couple with the inductor. The voltage summer comprises a pair of diodes coupled to the auxiliary winding and a pair of capacitors coupled to the pair of diodes. The auxiliary voltage bus is configured to receive a summed voltage from the voltage summer based on a sum of voltages stored in the pair of capacitors. The gate driver IC is configured to receive a voltage from a positive rail of the auxiliary voltage bus and to output a gate control signal to control a switching device based on the received voltage and based on a pulse signal generated by the controller.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: December 26, 2023
    Assignee: AES Global Holdings PTE Ltd.
    Inventors: Robert Ryan, Diarmuid Hogan
  • Patent number: 11855541
    Abstract: A plurality of power conversion units each include an inductor, a switching circuit, and a PWM control IC. An MPU outputs control signals to the plurality of power conversion units. Output parts of the plurality of power conversion units are connected to an output terminal in a parallel manner. Operating number signal generating circuits of feedback signal generating circuits generate an operating number signal Sop on the basis of individual current signals based on inductor currents in the plurality of power conversion units, and output the operating number signal to the MPU. The MPU sets operations of the plurality of power conversion units on the basis of the operating number signal, and outputs the control signals including the settings of the operations of the power conversion units.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: December 26, 2023
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Norikazu Sakamoto, Tatsuya Hosotani
  • Patent number: 11848603
    Abstract: An apparatus includes a controller configured to generate a PWM signal for controlling a power switch of a forward converter, a bias switch and a bias capacitor connected in series and coupled to a bias winding of the forward converter, and a comparator having a first input connected to the bias capacitor, a second input connected to a predetermined reference and an output configured to generate a signal for controlling the bias switch to allow a magnetizing current from the bias winding to charge the bias capacitor when a voltage across the bias capacitor is less than the predetermined reference.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: December 19, 2023
    Assignee: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Yushan Li, Liming Ye, Heping Dai
  • Patent number: 11848617
    Abstract: Power converter electronic circuitries configured to harvest and store energy from at least the parasitic oscillation occurring during the operation thereof. Methodologies of using such energy for the current injection, carried out by discharging the parasitic capacitance across the switching elements to achieve zero voltage switching condition for these switching elements. In a specific case, the methodology of current injection (with the use of so harvested and stored energy) is self-adjusting, causing the optimization of the energy required to discharge the parasitic capacitance.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: December 19, 2023
    Inventor: Ionel Jitaru
  • Patent number: 11848608
    Abstract: A control circuit for controlling a switching regulator includes a timer, a comparator, a driver circuit and a controller. The timer generates an input signal indicative of whether a predetermined amount of time has elapsed since an activation of a drive signal. The comparator is configured to compare a feedback voltage with a reference voltage to generate a comparison signal. The driver circuit is controlled by a control signal to generate the drive signal according to one of the input signal and the comparison signal. The control signal indicates whether a mode is enabled. When the mode is enabled, the driver circuit is configured to generate the drive signal according to the input signal. The controller is configured to, in response to an activation of the input signal, generate the control signal according to a result of a comparison of the feedback voltage with another reference voltage higher than the reference voltage.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: December 19, 2023
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Chi-Kuang Chang, Cheng-Hsiung Tsai
  • Patent number: 11848620
    Abstract: A first leg includes a first switch circuit disposed between a first node to which a positive electrode of a DC power supply is connected and a second node and a second switch circuit disposed between the second node and a third node. A first filter circuit includes a first capacitor. A bridge circuit includes a second leg and a third leg that are disposed in parallel between the first node and the third node. A clamp circuit includes a bidirectional switch disposed between a fourth node that is a midpoint of the second leg and a fifth node that is a midpoint of the third leg. A second filter circuit includes a first reactor and a second reactor.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: December 19, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takeshi Amimoto, Yu Kawai
  • Patent number: 11837959
    Abstract: An apparatus includes a controller. The controller controls a main power supply to produce an output signal to power multiple dynamic loads such as disposed in series or other suitable configuration. The controller detects a transient power consumption condition associated with a first dynamic load of the multiple dynamic loads. The controller then adjusts control of the main power supply and generation of the output signal based on the detected transient power consumption condition.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: December 5, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Darryl Tschirhart, Kushal Kshirsagar, Danny Clavette, Prasan Kasturi
  • Patent number: 11837945
    Abstract: An integrated circuit for a power supply circuit that includes a state-indicating circuit, which is a first or second circuit when the power supply circuit is of a non-isolated or isolated type, as the case may be. The integrated circuit including a voltage generation circuit that generates, at a first terminal, a voltage that is (1) lower than a first level, when the first circuit is coupled to the first terminal, (2) higher than a second level, when the second circuit is coupled to the first terminal, and (3) higher than the first level and lower than the second level, when no state-indicating circuit is coupled to the first terminal, and a determination circuit that determines that the power supply circuit is of the non-isolated or isolated type, when the voltage at the first terminal is lower or higher than the second level, as the case may be.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: December 5, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Nobuyuki Hiasa