Patents Examined by Jeffrey M Shin
  • Patent number: 10491437
    Abstract: A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK). The demodulator may comprise a clock extractor configured to generate a clock signal in response to receiving an amplitude-modulated input signal, a phase shifter configured to generate a sampling signal by phase-shifting the clock signal by approximately ?/2, and a sampler configured to sample the input signal in correspondence to one or more edges (such as one or more falling edges) of the sampling signal. In this way, the amplitude-modulated input signal may be sampled at its peak, or at least near its peak, thus ensuring high signal fidelity.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: November 26, 2019
    Assignee: MEDIATEK Singapore Pte. Ltd.
    Inventors: Junmin Cao, Hon Cheong Hor, Tieng Ying Choke
  • Patent number: 10484229
    Abstract: A PAM reception circuit includes a first comparison circuit that outputs a first bit value in two-bit values based on a result of a comparison between a reception signal of pulse amplitude modulation 4 in which the two-bit values are associated with four potential levels divided by three threshold values by gray codes and a first threshold value which is a center of the three threshold values, an absolute value circuit that outputs an absolute value of a difference between the reception signal and the first threshold value or a negative value obtained by inverting a sign of the absolute value from a positive sign to a negative sign, and a second comparison circuit that outputs a second bit value in the two-bit values based on a result of a comparison between a second threshold value which is larger than the first threshold value in the three threshold values.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: November 19, 2019
    Assignee: FUJITSU LIMITED
    Inventor: Noriyuki Tokuhiro
  • Patent number: 10476264
    Abstract: A power distribution system in operative association with a source and a plurality of loads includes a converter, a power distribution unit including a plurality of solid state power controllers and configured to provide power from converter to plurality of loads, and a fault protection unit operatively coupled to converter, power distribution unit, or both. The fault protection unit includes a sensor configured to sense current at output terminal of at least one of power distribution unit and converter and a controller configured to compare sensed current with a corresponding threshold value of current, identify presence of a fault in at least one of plurality of loads, power distribution unit, and converter based on comparison, and activate a desired protection scheme to provide fault ride through during the presence of the fault.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: November 12, 2019
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Pradeep Vijayan, Satish Prabhakaran, John Oliver Collins, Vishnu Mahadeva Iyer
  • Patent number: 10468902
    Abstract: A sensor charging case having multiple receptacles for multiple sensors. One receptacle is for charging while the other receptacles are for holding additional sensors. The receptacles can be arranged to hold the sensors releasably by the sides and leaving at least two surfaces generally exposed to the environment, e.g. two opposite surfaces such as a front and back of the sensor. By leaving the front surface of the sensor exposed a user can see what sensor is being held and/or the sensing element on the front surface of the sensor can be exposed to the environment. By leaving the back surface of the sensor exposed a user can remove the sensor and/or heat can be effectively transferred away from the back of the sensor to the environment.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: November 5, 2019
    Assignee: Zen-me Labs Oy
    Inventor: Toni Matti Virhiä
  • Patent number: 10460580
    Abstract: Integrating a direct current (DC) voltage motion sensing alarm with an alternating current (AC) voltage light source is presented herein. An apparatus can include a voltage conversion component that generates, within a wall switch box, a DC voltage from an AC voltage that is higher in magnitude than the DC voltage, and a motion sensing component that detects, from the wall switch box using the DC voltage, a motion of an object. The motion sensing component can detect the motion using an infrared and/or ultrasonic based DC sensor. The apparatus can further include a security component that generates, from the wall switch box using the DC voltage, an alarm signal and/or wireless alarm signal based on the motion, and a power component that switches, from the wall switch box using the DC voltage based on the motion, the AC voltage from a first contact to a second contact.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: October 29, 2019
    Assignee: OWL ENTERPRISES, LLC
    Inventors: Michael O'Brien, Rocco Terry, Donald Small
  • Patent number: 10461727
    Abstract: A system and method for generating a plurality of short RF pulses. The system and method comprises a first circuit comprising a first power supply and a plurality of first networks for generating a first output signal in a form of a high voltage pedestal pulse supplied to a common node, and a second circuit comprising a second power supply and a plurality of second networks for generating a second output signal in a form of a high voltage short pulse which is supplied to the common node. The pedestal pulse passes through a blocking inductor before being combined with the short pulse at the common node, and the short pulse is stacked on top of the pedestal pulse to form a combined high voltage pulse. A low frequency magnetron is coupled to the common node for receiving the stacked combined high voltage pulse and generating a short RF pulse.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: October 29, 2019
    Assignee: H6 SYSTEMS INC.
    Inventor: Michael William Hunter
  • Patent number: 10459018
    Abstract: Certain exemplary embodiments can provide a method, which can comprise automatically removing effects of local oscillator phase drift occurring in between two measurements of reciprocal networks as made with a vector network analyzer. The method can further comprise determining that the vector network analyzer substantially simultaneously samples all incident and reflected waves from the reciprocal networks.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: October 29, 2019
    Inventor: Alex Arsenovic
  • Patent number: 10452029
    Abstract: An embodiment of an optical lattice clock comprising atoms and a laser light source at an operational magic frequency is provided. The atoms are capable of making a clock transition between two levels of electronic states, and the laser light source generates at least a pair of counterpropagating laser beams, each of which having a lattice-laser intensity I. The pair of counterpropagating laser beams forms an optical lattice potential for trapping the atoms at around antinodes of a standing wave created by it. The operational magic frequency is one of the frequencies that have an effect of making lattice-induced clock shift of the clock transition insensitive to variation ?I of the lattice-laser intensity I, the lattice-induced clock shift being a shift in a frequency for the clock transition of the atoms caused by the variation ?I of the lattice-laser intensity I.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: October 22, 2019
    Assignee: RIKEN
    Inventor: Hidetoshi Katori
  • Patent number: 10447253
    Abstract: A high performance phase-locked loop, the device includes a phase frequency detector, a charge pump, a loop filter, a first oscillator having inverters, configured to generate a first current, a second oscillator having a scaled version of the inverters of the first oscillator, a digital to analog converter, configured to generate a second current by multiplying the first current and a frequency code, a voltage to current converter, configured to generate a third current by converting voltage output of the loop filter to current, wherein input current to the second oscillator is sum of the second current and the third current.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: October 15, 2019
    Assignee: MegaChips Corporation
    Inventor: Abhishek Kumar Khare
  • Patent number: 10439599
    Abstract: Embodiments include circuits, apparatuses, and systems for non-boolean associative processors. In embodiments, an electronic associative processor circuit may include first and second ring oscillators, each having an odd number of inverters, an input terminal, and an output terminal. A first capacitor may have a first terminal coupled with the output terminal of the first ring oscillator and a second capacitor may have a first terminal coupled with the output terminal of the second ring oscillator. Second terminals of the first and second capacitors may be coupled at an oscillator stage output terminal. The inverters of the first and second ring oscillators may be implemented with metal oxide semiconductor transistors. Other embodiments may be described and claimed.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: October 8, 2019
    Assignee: Intel Corporation
    Inventors: Dmitri E. Nikonov, Ian A. Young
  • Patent number: 10439556
    Abstract: An oscillator includes a tunable oscillator, a phase detector circuit communicatively coupled with an output of the tunable oscillator and an input to the oscillator, and an oscillator controller circuit configured to adjust frequency of the tunable oscillator based upon phase detection between output of the tunable oscillator and output of an external resonant element received at the input to the oscillator.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: October 8, 2019
    Assignee: MICROCHIP TECHNOLOGY INCORPORATED
    Inventor: Jason Sachs
  • Patent number: 10439590
    Abstract: A microelectromechanical system (MEMS) resonator includes a resonant semiconductor structure, drive electrode, sense electrode and electrically conductive shielding structure. The first drive electrode generates a time-varying electrostatic force that causes the resonant semiconductor structure to resonate mechanically, and the first sense electrode generates a timing signal in response to the mechanical resonance of the resonant semiconductor structure. The electrically conductive shielding structure is disposed between the first drive electrode and the first sense electrode to shield the first sense electrode from electric field lines emanating from the first drive electrode.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: October 8, 2019
    Assignee: SiTime Corporation
    Inventors: David Raymond Pedersen, Aaron Partridge, Thor Juneau
  • Patent number: 10432204
    Abstract: An atomic oscillator includes a gas cell encapsulating metal atoms, a coil disposed in a periphery of the gas cell, a laser source adapted to emit excitation light toward the gas cell, a heater adapted to heat the gas cell, and a wiring board adapted to supply the heater with power, and a plus line forming a plus current channel for the heater and provided to the wiring board, and a minus line forming a minus current channel for the heater and provided to the wiring board are disposed close to each other.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: October 1, 2019
    Assignee: Seiko Epson Corporation
    Inventors: Tomohiro Tamura, Koji Chindo
  • Patent number: 10431991
    Abstract: Techniques for tuning in a wireless power transmitter in a system, method, and apparatus are described herein. For example, an apparatus may include a transmitter coil configured to generate a magnetic field. The apparatus may also include a set of capacitors in series with the transmitter coil, wherein a capacitance value for each of capacitors in the set is associated with a reactance shift.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: October 1, 2019
    Assignee: Intel Corporation
    Inventors: Bin Xiao, Songnan Yang, Xintian E. Lin, Lei Shao, Jie Chen
  • Patent number: 10431989
    Abstract: A low voltage, low frequency multi-level power converter capable of power conversion is disclosed. The power converter may include a low voltage, low frequency circuit that includes a plurality of phase-shifting inverters in series; a plurality of low voltage source inputs, and a plurality of phase-shifting inverters in series. Each of the plurality of phase-shifting inverters may be configured to receive at least one of the plurality of low voltage source inputs; and generate at least one square wave output. A semi-sine wave output may be derived from the generated at least one square wave output.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: October 1, 2019
    Assignee: JABIL INC.
    Inventors: Salman Talebi Rafsanjan, David Michael Eckerson
  • Patent number: 10411479
    Abstract: A detection circuit includes: a first switch, a second switch, a first detection resistor and a second detection resistor, wherein the first switch and the first detection resistor are coupled in series to form a first branch, a first end of the first branch is electrically connected with a positive bus of the photovoltaic inverter and a second end of the first branch is electrically connected with a ground; and the second switch and the second detection resistor are coupled in series to form a second branch, a first end of the second branch is electrically connected with a negative bus of the photovoltaic inverter and a second end of the second branch is electrically connected with the ground.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: September 10, 2019
    Assignee: Delta Electronics (Shanghai) CO., LTD
    Inventors: Bingwen Weng, Xuancai Zhu, Kerou Wang, Jinfa Zhang
  • Patent number: 10411700
    Abstract: A method and an apparatus for driving a power switch tube. The apparatus includes an input unit, a drive unit, a transformer and a power switch tube. The input unit is connected to the drive unit, which is configured to input a group of drive signals, and the group of drive signals includes four drive signals, where the first drive signal and the second are complementary signals, and a dead time exists; the third drive signal and the fourth are complementary signals, and a dead time exists; the phase difference between the first drive signal and the third is 180 degrees, and the phase difference between the second drive signal and the fourth is 180 degrees; the drive unit is configured to power on a field winding of the transformer; and the transformer provides a drive voltage signal for the power switch tube.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: September 10, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Xujun Liu
  • Patent number: 10411473
    Abstract: Power converters for use in energy systems are included. For instance, an energy system can include an input power source configured to provide a low voltage direct current power. The energy system can include a power converter configured to convert the low voltage direct current power provided by the input power source to a medium voltage multiphase alternating current output power suitable for provision to an alternating current power system. The power converter can include a plurality conversion modules. Each conversion module includes a plurality of bridge circuits. Each bridge circuit includes a plurality of silicon carbide switching devices coupled in series. Each conversion module is configured to provide a single phase of the medium voltage multiphase alternating current output power on a line bus of the energy system.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: September 10, 2019
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Robert Gregory Wagoner, Govardhan Ganireddy, Saurabh Shukla, Rajni Kant Burra, Ravisekhar Nadimpalli Raju, Rui Zhou, Rajib Datta, John Leo Bollenbecker
  • Patent number: 10411679
    Abstract: The present utility model relates to an ultra-low voltage two-stage ring voltage-controlled oscillator applied to a chip circuit. The oscillator includes two-stage delay units. The oscillator includes two delay units that are connected end-to-end, and adjusts a working frequency by adjusting delay time of the delay unit. The delay unit includes PMOS transistors M1, M2, M3, and M4, NMOS transistors M5, M6, M7, and M8, and a load capacitor CL. The two-stage ring voltage-controlled oscillator of the present utility model uses a substrate feed forward bias structure, reduces a threshold voltage of a transistor, reduces a supply voltage, reduces power consumption, has a large tuning range, and is particularly suitable for a system that works at a low supply voltage.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: September 10, 2019
    Assignee: APLUS SEMICONDUCTOR TECHNOLOGIES CO., LTD.
    Inventor: Shuihe Cai
  • Patent number: 10404244
    Abstract: An example device in accordance with an aspect of the present disclosure includes a first stage and an accumulator. The first stage is based on digital logic and integer arithmetic to scale a reference clock by a configurable ratio of integers according to a line drawing technique to obtain an output clock. The accumulator is to store an accumulated error of a variable used in the line drawing technique.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: September 3, 2019
    Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Christopher Wesneski, Theodore F. Emerson, Kenneth T. Chin