Abstract: Regulation of powertrain converter circuits is provided. The power conversion may include converting between direct current and alternating current and the regulation may include reduction of distortion on switching start up and zero-crossings. Solid-state implementations, code implementations, and mixed implementations are provided.

Abstract: The low input voltage boost converter with peak inductor current control and offset compensated zero detection provide a boost converter scheme to harvest energy from sources with small output voltages. Some embodiments described herein includes a thermoelectric boost converter that combines an IPEAK control scheme with offset compensation and duty cycled comparators to enable energy harvesting from TEG inputs as low as 5 mV to 10 mV, and the peak inductor current is independent to first order of the input voltage and output voltage. A control circuit can be configured to sample the input voltage (VIN) and then generate a pulse with a duration inversely proportional to VIN so as to control the boost converter switches such that a substantially constant peak inductor current is generated.

Abstract: A power converter (e.g., AC-DC converter) includes an input inductor coupled between a first AC voltage source input node and a central node, a first switch coupled between the central node and a first rail node, a second switch coupled between the central node and a second rail node, and a resonant output circuit. The first switch has a body diode that passes current from the first rail node to the central node. The second switch has a body diode that passes current from the central node to the second rail node. A first input device controls current flow between the first rail node and the second AC voltage source input node, and a second input device controls current flow between the second rail node and the second AC voltage source input. The output circuit includes at least one capacitor and at least one inductor which form a resonant network, hence are denominated as resonant capacitor(s) and resonant inductor(s).

Abstract: A high efficiency switched capacitor voltage regulator circuit and a method of efficiently generating an enhanced voltage from an input voltage supply. An input voltage Vin from a main power source is the base voltage to be pumped to an enhanced voltage. Auxiliary voltage sources V1 and V2 are from sources (or grounds) available in the system. During phase 1 of a clock signal, a pump capacitor is charged to ?V=V2?V1. During phase 2 of the clock signal, the pump capacitor is connected in series between Vin and an output capacitor, resulting in the sum voltage V=Vin+?V being generated across the output capacitor.

Abstract: A power converter system includes first and second input terminals; a converter connected to the first and second input terminals and including an output terminal; a start-up circuit connected to a first capacitor and configured to charge the first capacitor during start-up and hiccup conditions; a voltage source connected to the first and second input terminals and configured to provide, during the start-up and hiccup conditions, a voltage proportional to a voltage applied to the first and second input terminals; and a voltage buffer including a MOSFET with a gate connected to the voltage source, a source connected to the start-up circuit, and a drain connected to one of the first and second input terminals.

Abstract: A power conversion device includes a power switch a first main terminal coupled to a higher potential portion, a second main terminal coupled to a lower potential portion, and a tap coupled to the first main terminal to provide a current for charging a supply terminal capacitor. A controller is coupled to a control terminal of the power switch to control switching of the power switch to produce a regulated output. A supply terminal is to be coupled to a supply terminal capacitor to store a charge for supplying power to at least some of the components of the controller. A voltage regulator is coupled to regulate the charge stored and a potential on the supply terminal capacitor. The current for charging the supply terminal capacitor is selectively drawn from the tap of the power switch in response to the supply terminal capacitor being below a threshold.

Abstract: A regulator circuit includes: a current detector configured to sense a load current and convert the sensed load current to a DC current sense signal; and an adjustment circuit configured to adjust an output voltage within predetermined upper and lower voltage limits based on the DC current sense signal.

Abstract: A switching DC-DC voltage regulator (VR) provides for light and sinking loads by compute components of an information handling system (IHS). A controller detects a load current value and a voltage output value of a synchronous Buck VR. In response to detecting that the load current value is less than a threshold value, the controller drives a high side control switch (HS) and low side synchronous switch (LS) to regulate an output voltage value across a capacitor by causing an inductor current ripple through an inductor of the synchronous Buck VR in discontinuous conduction mode (DCM) to reduce power consumption during a light load. In response to detecting an electrical characteristic indicative of a voltage overshoot of the output voltage, the controller drives the HS and LS to cause the synchronous Buck VR to perform forced continuous conduction mode (FCCM) to sink the load current each switching cycle.

Abstract: Disclosed is a buck converter for converting a high voltage at the input of the buck converter to a low voltage at the output of the buck converter. The buck converter includes a control circuitry configured to control a duty cycle of a control switch, the control switch being interposed between the input and the output of the buck converter. A synchronous switch is interposed between the output and ground. The control switch and the synchronous switch comprise depletion-mode III-nitride transistors. In one embodiment, at least one of the control switch and the synchronous switches comprises a depletion-mode GaN HEMT. The buck converter further includes protection circuitry configured to disable current conduction through the control switch while the control circuitry is not powered up.

Abstract: In one embodiment a method of extending power supply hold-up time by controlling a transformer turn ratio may include an input capacitor receiving an input voltage of a transformer unit. A first control transistor may switch a first transformer winding to an on state in response to the input voltage being above a voltage threshold level. The first control transistor may switch the first transformer winding to an off state in response to the input voltage being below the voltage threshold level. A second control transistor may switch a second transformer winding to an on state in response to the input voltage being below the voltage threshold level, wherein the first transformer winding and the second transformer winding may include separate windings located on a same side of a magnetic core of the transformer unit. In an embodiment the transformer unit may include a power supply unit.

Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.

Abstract: Exemplary embodiments are related to switching power converters. A switching power converter may comprise a plurality of control unit configured for average current mode control, wherein each control unit of the plurality comprises a dedicated proportional control unit. The switching power converter may further comprise an integrator coupled to each control unit of the plurality of control unit and configured to convey a signal to each control unit.

Abstract: A dual mode direct current-to-alternating current (DC-AC) micro-inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC micro-inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “voltage control mode” when connection to the active external AC source is absent. Processes for operating an array of these micro-inverters are disclosed. The dual mode operation capability enables the micro-inverter(s) to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., voltage control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the voltage control mode of operation, a process may include designating a master from the array of micro-inverters in order to establish the voltage and frequency references.

Abstract: A power converter controller asserts a leading edge signal when a leading edge of a voltage signal is detected. The voltage sense signal is representative of an input voltage of the power converter. A trailing edge signal is asserted when a trailing edge of the voltage signal is detected. A first state of a threshold signal is generated when the voltage sense signal is at or above an upper threshold and generating a second state of the threshold signal when the voltage sense signal is at or below a lower threshold. A conduction signal is updated in response to the leading edge signal, the trailing edge signal, and the threshold signal. The conduction signal is for controlling a switch coupled to regulate an output of the power converter.

Abstract: A system, method, and apparatus is disclosed for interfacing and transferring power unidirectionally or bidirectionally between a direct current (DC) line and a single or multiphase alternating-current (AC) line for only half of any given phase and only a single phase at a time when polarity is matched between the DC and the AC system. A circuit with simplified, robust, and reduced-cost components perform the power conditioning and the synchronization as a system that simulates a half-wave rectifier/inverter.

Abstract: A control device controls a rectifier of a switching converter that is supplied with an input voltage and provides an output current. The rectifier is configured to rectify the output current of the converter and has at least one transistor. The control device, when the at least one transistor is turned off, provides a slow discharge path to ground in a normal operation condition and provides a fast discharge path to ground for discharging the control terminal of the at least one transistor in response to detecting a zero cross event of the current flowing through said at least one transistor.

Abstract: An SMPS received a rectified periodic input line voltage and is configure to provide a regulated output. A power switch has a constant turn-on time in a given cycle of the rectified periodic input line voltage. A maximum value of the envelope of peak currents through the power switch is determined and is compared with a reference value, and the power switch turn-on time in the next cycle is adjusted accordingly. The output of the power supply is regulated to a target output value, and the current is in phase with the periodic input line voltage, resulting in a high power factor. No sampling of the line voltage is needed to maintain the high power factor. A controller chip can have as few as five pins. Alternatively, a seven-pin controller chip can have two external resistors for selecting operations in either Boundary Conduction Mode (BCM) or Discontinuous Conduction Mode (DCM).

Abstract: A multiphase buck converter (10) is disclosed, comprising: —a first buck converter branch (SD1, L1) comprising a first core section (COR1), a first power section (PWR1) having a first output node (LX1), a first coil (11) having a first end connected to the first output node (LX1), the first power section (PWR1) being adapted to be controlled by the first core section (COR1) for providing to the coil (L1) a coil current (I1), the first core section (COR1) and the first power section (PWR1) being integrated in a chip (IC); —a second buck converter branch (SD2, L2) comprising a second core section (COR2), a second power section (PWR2) having a second output node (LX2), a second coil (L2) having a first end connected to the second output node (LX2), the second power section (PWR2) being adapted to be controlled by the second core section (COR2) for providing to the second coil (L2) a second coil current (I2), the second core section (COR2) and the second power section (PWR2) being integrated in said chip (IC); —a

Abstract: A power conversion apparatus includes: a primary side full bridge circuit having a first arm circuit and a second arm circuit in parallel, a secondary side full bridge circuit having a third arm circuit and a fourth arm circuit in parallel, and a control unit configured to adjust a first phase difference between switching of the first arm circuit and switching of the third arm circuit and a second phase difference between switching of the second arm circuit and switching of the fourth arm circuit to control transmitted power that is transmitted between the primary side full bridge circuit and the secondary side full bridge circuit, wherein the control unit, among the first phase difference and the second phase difference, causes the phase difference between arm circuits having a higher efficiency to be larger than the phase difference between arm circuits having a lower efficiency.

Abstract: An electric power conversion system includes: a primary circuit including a first port, a second port and a primary electric power conversion unit; and a secondary circuit magnetically coupled to the primary circuit by a transformer and including a third port, a fourth port and a secondary electric power conversion unit. The electric power conversion system is configured to convert electric power between any two of the four ports with the use of the primary and secondary electric power conversion units, and convert electric power between the first and second ports and between the third and fourth ports with the use of electric power conversion circuit portions other than a faulty electric power conversion circuit portion among a plurality of electric power conversion circuit portions configured in the primary and secondary electric power conversion units.