Abstract: In one embodiment of the present invention, a 10-bit encoded video word is received and stored as two five-bit representations. One of the stored five-bit representations is selected by a multiplexor and provided to a parallel-to-serial converter. The parallel-to-serial converter receives control signals from a multiphase clock. Specifically, the multiphase clock provides a five-phase multi-phased clocks in order to control the parallel-to-serial converter. The serial-to-parallel converter provides a 10-bit serial representation of the 10-bit encoded input.