Patents Examined by Jermela Hollington
  • Patent number: 7038442
    Abstract: A system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photons emitted by background sources. The analysis involves spatial and/or temporal correlation of photon emissions. After correlation, the analysis may further involve obtaining a likelihood that the correlated photons were emitted by a transistor. After correlation, the analysis may also further involve assigning a weight to individual photon emissions as a function of the correlation. The weight, in some instances, reflecting a likelihood that the photons were emitted by a transistor. The analysis may further involve automatically identifying transistors in a photon emission image.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: May 2, 2006
    Assignee: Credence Systems Corporation
    Inventors: Romain Desplats, Patricia Le Coupanec, William K. Lo, Philippe Perdu, Steven Kasapi
  • Patent number: 7038474
    Abstract: A technique is described for performing critical parameter analysis (CPA) of a semiconductor device (DUT) by combining the capabilities of conventional automated test equipment (ATE) with a focused optical beam scanning device such as a laser scanning microscope (LSM). The DUT is provided with a fixture such that it can be simultaneously scanned by the LSM or a similar device and exercised by the ATE. The ATE is used to determine pass/fail boundaries of operation of the DUT. Repeatable pass/fail limits (for timing, levels, etc.) are determined utilizing standard test patterns and methodologies. The ATE vector pattern(s) can then be programmed to “loop” the test under a known passing or failing state. When light energy from the LSM scanning beam sufficiently disturbs the DUT to produce a transition (i.e.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: May 2, 2006
    Assignee: International Business Machines Corporation
    Inventors: Patrick J. McGinnis, John D. Sylvestri
  • Patent number: 7015715
    Abstract: Systems and methods are disclosed for measuring a distance (or gap) between substrates of a hybrid semiconductor. The measurements may be made during a hybridization process to, for example, provide alignment feedback during the hybridization process. The measurements may also be made after the hybridization process to further calibrate the process or to provide information useful for further processing operations.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: March 21, 2006
    Assignee: Indigo Systems Corporation
    Inventors: William J. Parrish, Jeffrey B. Barton, Naseem Y. Aziz, Adrienne N. Costello