Patents Examined by Jermele Hollingtonn
  • Patent number: 6278286
    Abstract: An interconnect and system for making temporary electrical connections with semiconductor components are provided. The interconnect can be included in a wafer level test system for testing semiconductor wafers, or in a die level test system for testing singulated dice and chip scale packages. The interconnect includes a substrate with patterns of elastomeric contacts adapted to electrically engage contact locations (e.g., bond pads, solder bumps) on the semiconductor components. The elastomeric contacts can be formed of conductive elastomer materials, such as anisotropic adhesives and silver filled silicone, having metal particles for penetrating the contact locations. The substrate also includes patterns of metal conductors having non-oxidizing contact pads, which provide low resistance bonding surfaces for the elastomeric contacts. The elastomeric contacts can be initially deposited as bumps in a required size and shape using stenciling, screen printing, or other deposition process.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: August 21, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Salman Akram