Abstract: A SOI MOS field effect transistor includes: a superficial top semiconductor layer of a first conductivity type formed on a SOI substrate; source and drain regions of a second conductivity type arranged apart from each other on the top semiconductor layer; a P-type first channel region, an N+-type floating region, and a P-type second channel region formed in this order in a self-aligned manner and disposed between the N+-type source region and the N+-type drain region for an N-type MOSFET, or an N-type first channel region, a P+-type floating region, and an N-type second channel region formed in this order in a self-aligned manner and disposed between the P+-type source region and the P+-type drain region for a P-type MOSFET; and two gate electrodes for controlling the first and second channel regions, wherein a doping concentration of the second channel region adjacent to the drain region is lower than a doping concentration of the first channel region adjacent to the source regi