Patents Examined by John Callahan
  • Patent number: 4641416
    Abstract: The invention comprises an improved integrated circuit structure wherein an active device is formed in a silicon substrate for forming an intrinsic base region over a buried collector and an emitter is formed on the intrinsic base region to comprise three electrodes of the active device and at least one extrinsic base segment is formed in the substrate adjacent to the intrinsic base region to provide a contact for the intrinsic base; the improvement which comprises: separating the extrinsic base segment from the emitter formed on the intrinsic base to prevent the formation of a parasitic P-N junction between the extrinsic base and the emitter.
    Type: Grant
    Filed: March 4, 1985
    Date of Patent: February 10, 1987
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ali Iranmanesh, Christopher O. Schmidt
  • Patent number: 4595428
    Abstract: A semiconductor device and a method for its preparation are disclosed, wherein a body of semiconducting material has at least one bore extending completely therethrough, this bore having a substantially constant diameter of less than about 1.5 mils and an average length-to-diameter ratio of at least about 6:1, this bore being defined by a region of the semiconducting material in the recrystallized state having therein throughout the region a substantially constant uniform concentration level of atoms of at least one metal selected from the group consisting of aluminum, indium, gallium, antimony, gold, silver and tin in addition to the initial content of the semiconducting material.
    Type: Grant
    Filed: January 3, 1984
    Date of Patent: June 17, 1986
    Assignee: General Electric Company
    Inventors: Thomas R. Anthony, Douglas E. Houston, James A. Loughran
  • Patent number: 4580332
    Abstract: An improved integrated circuit structure, and method of making the structure, is disclosed wherein at least one metallization layer is coated with a conductive indium arsenide layer during production of the structure and an upper metallization layer subsequently is applied to the structure wherein at least a portion of the subsequent metallization layer is in ohmic contact with the conductive indium arsenide layer whereby the lower metallization layer is protected by the intervening indium arsenide layer during subsequent removal of the upper metallization layer if subsequent reworking of the structure becomes necessary. The use of the indium arsenide layer over a metallization layer further enhances the construction process by the use of its antireflective properties during patterning of a photoresist applied over the indium arsenide layer.
    Type: Grant
    Filed: March 26, 1984
    Date of Patent: April 8, 1986
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Yan A. Borodovsky