Patents Examined by John Fallansbee
  • Patent number: 7415540
    Abstract: Scheduling the processing of threads by scheduling a datagram from an input queue among a plurality of input queues to a thread for processing. The scheduling includes computing an output position in an output queue, communicating with a plurality of threads for processing, and assigning the datagram to one of said plurality of threads for processing. After processing the datagram, the processing thread enqueus the datagram in the output queues at the output position specified by the scheduled output position.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: August 19, 2008
    Assignee: Intel Corporation
    Inventors: Michael Fallon, Makaran Raghunandan
  • Patent number: 5922063
    Abstract: A method and apparatus for reducing the software overhead of message passing in parallel systems. Special purpose hardware assists in constructing each data message sent through a network. Message passing systems generally require that every message be prefixed with a message header describing the key control parameters of the message. The software task is to construct the message header for every message individually and to transmit the header prefixed to every message. The software is relieved of constructing the message header and uses special purpose hardware to accomplish the job more efficiently.
    Type: Grant
    Filed: September 17, 1992
    Date of Patent: July 13, 1999
    Assignee: International Business Machines Corporation
    Inventors: Howard Thomas Olnowich, Michael Wayland Dotson, James William Feeney, Robert Francis Lusch, Michael Anthony Maniguet