Abstract: Exemplary methods, apparatuses, and systems include a file system process determining to a flush a node in a first tree. The first node includes a buffer structured as a second tree. The file system process generates an input/output instruction to load the buffer from a first memory to a second memory. The second tree is stored in two more non-contiguous locations in the first memory and the input/output operation includes a read operation corresponding to each of the two or more non-contiguous locations. The file system process causes the input/output instruction to be executed concurrently on the first memory.

Abstract: A memory system with at least one namespace includes a memory device and a controller. The memory device includes a plurality of single-level cell (SLC) buffers and a plurality of memory blocks, wherein each memory block includes a plurality of memory cells, each memory cell storing multi-bit data, and is allocated for a respective one of a plurality of zones, wherein each of the at least one namespace is divided by at least some of the plurality of zones. The controller is configured to receive a program request related to at least one application program executed by a host, to determine at least one zone designated by the at least one application program as an open state, and to control the memory device to perform a program operation on at least one memory block allocated for an open state zone.

Abstract: Provided are techniques for using real segments and alternate segments in Non-Volatile Storage (NVS). One or more write requests for a track are executed by alternating between storing data in one or more sectors of real segments and one or more sectors of alternate segments for each of the write requests, while setting indicators in a real sector structure and an alternate sector structure. In response to determining that the one or more write requests for the track have completed, the data stored in the one or more sectors of the real segments and in the one or more sectors of the alternate segments are merged to form newly written data. In response to determining that a hardened, previously written data of a track does exist in Non-Volatile Storage (NVS), the newly written data is merged with the hardened, previously written data in the NVS. The merged data is committed.

Abstract: Systems for high performance restore of data to storage devices. A method embodiment commences upon identifying a plurality of virtual disks to be grouped together into one or more consistency sets. Storage I/O commands for the plurality of virtual disks of the consistency sets are captured into multiple levels of backup data. On a time schedule, multiple levels of backup data for the virtual disks are cascaded by processing data from one or more higher granularity levels of backup data to one or more lower granularity levels of backup data. A restore operation can access the multiple levels of backup data to construct a restore set that is consistent to a designated point in time or to a designated state. Multiple staging areas can be maintained using lightweight snapshot data structures that each comprise a series of captured I/Os to be replayed over other datasets to generate a restore set.

Abstract: A method, computer program product, and computing system for receiving content on a high-availability storage system. The content is compared to one or more entries in a static database associated with a cache memory system of the high-availability storage system. If the content does not match the one or more entries in the static database, the content is compared to one or more entries in a dynamic database associated with the cache memory system. If the content does not match the one or more entries in the dynamic database: the content is written to the cache memory system and a representation of the content is written to a temporal database associated with the cache memory system and maintained for a defined period of time.

Abstract: A processor having a functional slice architecture is divided into a plurality of functional units (“tiles”) organized into a plurality of slices. Each slice is configured to perform specific functions within the processor, which may include memory slices (MEM) for storing operand data, and arithmetic logic slices for performing operations on received operand data. The tiles of the processor are configured to stream operand data across a first dimension, and receive instructions across a second dimension orthogonal to the first dimension. The timing of data and instruction flows are configured such that corresponding data and instructions are received at each tile with a predetermined temporal relationship, allowing operand data to be transmitted between the slices of the processor without any accompanying metadata. Instead, each slice is able to determine what operations to perform on received data based upon the timing at which the data is received.

Abstract: Systems and methods are disclosed comprising receiving a request for a descriptor of a storage system, sending the descriptor to the host including an indication that a component of the storage device is in a restricted operation mode, wherein the host device utilizes the indication to determine a boot mode of the host device.

Abstract: A processor having a functional slice architecture is divided into a plurality of functional units (“tiles”) organized into a plurality of slices. Each slice is configured to perform specific functions within the processor, which may include memory slices (MEM) for storing operand data, and arithmetic logic slices for performing operations on received operand data. The tiles of the processor are configured to stream operand data across a first dimension, and receive instructions across a second dimension orthogonal to the first dimension. The timing of data and instruction flows are configured such that corresponding data and instructions are received at each tile with a predetermined temporal relationship, allowing operand data to be transmitted between the slices of the processor without any accompanying metadata. Instead, each slice is able to determine what operations to perform on received data based upon the timing at which the data is received.

Abstract: The described technology is generally directed towards mapping doubly mapped storage clusters to resources of a real storage cluster in a way that provides high performance. In one aspect, the doubly mapped storage clusters are divided into logical columns, with each logical column corresponding to a doubly mapped node, and having a column height corresponding to a number of storage resources (e.g., disks multiplied by disk extents) managed by that doubly mapped node. The columns are logically positioned within a logical profile having dimensions of the real storage cluster. For example, the logical columns can be selected based on column height, and placed in the logical profile based on free disk extents of the nodes, greatest number of free disk extents first. Once logically positioned, the logical columns in the logical rectangle establish the mapping (e.g., embodied in a mapping table) that results in high performance.

Abstract: Disclosed are an electronic device and a data compression method thereof. According to a data compression method of an electronic device of the present invention, the method comprises the steps of: compressing a page; determining whether data included in the compressed page is stored in a memory; and merging the compressed page with data previously stored in the memory when a result of the determination shows that the data included in the compressed page is the same as the previously stored data. Therefore, the electronic device can prevent a page including the same or similar data from being stored a multiple number of times in a swap area, thereby raising memory securing efficiency.

Abstract: Transferring data between a first storage device coupled to a host computing system and a second storage device coupled to the first storage device includes the first storage device receiving a command from the host computing system, the first storage device determining if the command is an out-of-band (OOB) storage command, and, if the command is an OOB storage command, the first storage device sending a command to the second storage device to cause data to be transferred directly between the first storage device and the second storage device independent of the host computing system. Transferring data between a first storage device coupled to a host computing system and a second storage device coupled to the first storage device may also include the first storage device emulating a host computing system in connection with communicating with the second storage device. The second storage device may be a tape emulation unit.

Abstract: A determination is made that a point-in-time copy of a consistency group of a production volume has to be stored in a backup storage that is configured to store a plurality of point-in-time copies generated at a plurality of time instants. An extent of a thin provisioned volume of a highest storage tier of a tiered storage is allocated to store the point-in-time copy of the consistency group. A process is initiated for storing the point-in-time copy of the consistency group to the extent of the highest storage tier of the tiered storage.

Abstract: Provided is a storage system and a storage management method, aiming at reducing data movement amount necessary for using an expanded capacity in a distributed RAID. When only A (A is a positive integer) physical storage drives are added, a storage controller selects virtual parcels that are mapped to different physical storage drives among N physical storage drives and are included in different virtual chunks, changes an arrangement of the selected virtual parcels to the added A physical storage drives, and constitutes a new chunk based on unallocated virtual parcels selected from different physical storage drives among the (N+A) physical storage drives.

Abstract: An approach is provided in which a system includes a GPU cluster. The GPU cluster includes multiple GPU nodes, that each includes a GPU core and a corresponding local cache. The GPU cluster also includes a shared memory and an internal bus that maintains cache coherency between the shared memory and the local caches included in the GPU nodes.

Abstract: The disclosure concerns a flash memory interface having a memory management unit including a comparator configured to determine whether an address of a flash memory access operation corresponds to a logical address or a physical address by comparing the address with one or more address ranges and a logical memory unit configured to convert logical addresses into physical addresses and to provide the physical addresses to the flash memory. The memory management unit is configured to direct physical addresses to the flash memory and to direct logical addresses to the logical memory unit for conversion into physical addresses.

Abstract: A data management method for a processor to which a first cache, a second cache, and a behavior history table are allocated, includes tracking reuse information learning cache lines stored in at least one of the first cache and the second cache; recording the reuse information in the behavior history table; and determining a placement policy with respect to future operations that are to be performed on a plurality of cache lines stored in the first cache and the second cache, based on the reuse information in the behavior history table.

Abstract: An embodiment of a semiconductor apparatus may include technology to selectively determine a set of data for background refresh based at least in part on host-provided information, and refresh the determined set of data on a persistent storage media as a background operation. Other embodiments are disclosed and claimed.

Abstract: A method, computer program product, and computer system for receiving, by a computing device, an I/O request. It may be identified whether the I/O request is eligible for handling via a first path without also requiring handling via a second path. If the I/O request is eligible, the I/O request may be processed via the first path on a host I/O stack without processing the I/O request via the second path on a storage array I/O stack. If the I/O request is ineligible, the I/O request may be processed via the first path on the host I/O stack and via the second path on the storage array I/O stack.

Abstract: The storage system includes a first partition which is associated with a first processor and in which the first processor temporarily stores data relating to I/O requests processed by the first processor; and a second partition which is associated with a second processor and in which the second processor temporarily stores data relating to I/O requests processed by the second processor. Each processor independently controls the size of the first partition of the first cache memory and the size of the first partition of the second cache memory, and also independently controls the size of the second partition of the first cache memory and the size of the second partition of the second cache memory.

Abstract: A data storage apparatus includes a nonvolatile memory device including a plurality of memory blocks in which a plurality of word lines to which one or more pages are coupled are arranged, a data buffer configured to buffer data to be stored in the one or more pages of the nonvolatile memory device, and a processor configured to detect, when a sudden power off (SPO) occurs, one or more first pages in which an interference has occurred in a memory block in use and store data corresponding to the one or more first pages in which the interference has occurred among the data buffered in the data buffer in a backup memory block of the nonvolatile memory device.