Patents Examined by John I. Follansbee
  • Patent number: 5822786
    Abstract: Dedicated parallel comparators perform expand up or expand down segment limit checks for memory accesses. A first three-input comparator has as inputs the complement of the segment limit, the effective address of the first byte of the access, and an configurable third input. For expand up segments, the configurable third input is set to one less than the memory access size. A carry out of the first comparator is generated, and thereby a limit fault indicated, if the address of the last byte of the access exceeds the segment limit. For expand down segments, the configurable third input is set to zero. In this case, the lack of a carry out of the first comparator indicates that the address of the first byte of the access exceeds the segment limit. For expand down segments a parallel second two-input comparator is also used. The second comparator has as inputs the effective address and a hybrid second input. A least significant portion of the hybrid input is set to one less than the memory access size.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: October 13, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Larry Widigen, Elliot A. Sowadsky