Patents Examined by John Loomis
  • Patent number: 6112202
    Abstract: A system and method are provided for searching for desired items from a network of information resources. In particular, the system and method have advantageous applicability to searching for World Wide Web pages having desired content. An initial set of pages are selected, preferably by running a conventional keyword-based query, and then further selecting pages pointing to, or pointed to from, the pages found by the keyword-based query. Alternatively, the invention may be applied to a single page, where the initial set includes pages pointed to by the single page and pages which point to the single page. Then, iteratively, authoritativeness values are computed for the pages of the initial set, based on the number of links to and from the pages. One or more communities, or "neighborhoods", of related pages are defined based on the authoritativeness values thus produced.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: August 29, 2000
    Assignee: International Business Machines Corporation
    Inventor: Jon Michael Kleinberg
  • Patent number: 6098077
    Abstract: Distributed management information for management of a predetermined unit of data is stored in a redundant area of respective blocks of a flash memory, whereas collected management information for all-at-once management of the data is stored in a predetermined block of the flash memory. When using the flash memory, it is determined whether the collected management information has an error. If any error is detected, collected management information is created from the distributed management information in the redundant area of the respective blocks. If the aforementioned data is modified, the collected management information is re-created according to the distributed management information of the redundant area of the respective blocks so that the collected management information is stored in the aforementioned predetermined block.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: August 1, 2000
    Assignee: Sony Corporation
    Inventor: Akira Sassa
  • Patent number: 5956505
    Abstract: A method is provided for activating an optional feature in a data processing device that includes a microprocessor and memory. The method includes storing in the memory: a number of applications programs, at least one of which has at least one optional feature; application manager software for controlling access to the application programs; a communications software module, accessed by means of the application manager, for controlling data communication by the device; and a program activation software module, accessed by means of the application manager and including activation data that indicates whether each optional feature is activated or unactivated. The method also includes receiving a request to operate one of the optional features, determining by reference to the activation data whether the feature is activated or unactivated, operating the feature if it is activated and otherwise preventing operation of the feature.
    Type: Grant
    Filed: December 24, 1991
    Date of Patent: September 21, 1999
    Assignee: Pitney Bowes Inc.
    Inventor: Flavio M. Manduley
  • Patent number: 5854936
    Abstract: A code server operates in a data processing system having an operating system or environment, such as OS/2 or Windows, which processes coded programs in discrete code modules. The code server maintains linkage information between the various code modules forming an association representing all the linkage data for the entire program. This information is gathered by way of searching through the files of the computer network or by direct insertion into the code module information table. Once the associative data has been gathered, a coded program may be retrieved quickly and efficiently without the need for repetitive on-line searching because the user need refer only to the code server which contains a look-up tables storing the data representing the associative information.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: December 29, 1998
    Assignee: REC Software, Inc.
    Inventor: Stephen F. B. Pickett
  • Patent number: 5819261
    Abstract: This invention provides an information processing method and apparatus, which can automatically set a word, which has already been electronically stored, as a search keyword, and can perform a search operation. For this purpose, in an information search apparatus for searching a data file for desired data, and reading out the desired data, input text data is stored in a data storage area, and when extraction of a search keyword is instructed, a search keyword extraction program automatically extracts a keyword used for search from the text data stored in the data storage area in response to the instruction. A multimedia data file stored in a nonvolatile storage medium is searched based on the extracted keyword.
    Type: Grant
    Filed: March 21, 1996
    Date of Patent: October 6, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Fumiaki Takahashi, Hideo Takiguchi
  • Patent number: 5754848
    Abstract: An apparatus and method facilitates the conversion of filenames using the conventional 8.3 filename construct and long filenames. A converter is coupled to a software library which permits the running of backup applications from an 8.3 filename system. The library contains internal and external APIs which allow the 8.3 filename system to create files and directories using the long filename convention.
    Type: Grant
    Filed: September 11, 1996
    Date of Patent: May 19, 1998
    Assignee: Hewlett-Packard Co.
    Inventor: David H. Hanes
  • Patent number: 5577244
    Abstract: A software program having a plurality of separately installable features installed on a computer system is to be updated. An end user invokes an update program to update the installed software program. The user selects one of a plurality of operating modes for the computer system and identifies a target drive and directory where the software program is stored. Thereafter, the user identifies a source drive and directory where a plurality of update files are stored. If a prompted mode of operation has been selected, the system copies the update files from the source drive and directory to the target drive and directory and then applies all of the updates to the respective features stored on the target drive in a sequential manner. If a full function mode of operation has been selected, the system copies the update files from the source drive and directory to the target drive and directory and then displays the highest numbered update stored on the target drive and directory for a selected installed feature.
    Type: Grant
    Filed: January 26, 1990
    Date of Patent: November 19, 1996
    Assignee: International Business Machines Corporation
    Inventors: Alice J. Killebrew, Charles F. Mann
  • Patent number: 5421011
    Abstract: Disclosed is a method and system for allowing resource control in a UNIX-based system to be done on an aggregate, or group, basis. This enables both access control and accounting to be done in units of groups instead of units of users. This design is upwardly compatible with the current implementation which does resource allocation and accounting in units of users. In addition, the method and system provides greater flexibility in selecting the system availability policy to be enforced. A resource quota scheme is introduced wherein a pooled resource account allows a system administrator to segregate processes into critical/non-critical classifications.
    Type: Grant
    Filed: December 20, 1991
    Date of Patent: May 30, 1995
    Assignee: International Business Machines Corporation
    Inventors: Nicholas A. Camillone, Douglas H. Steves, Kendall C. Witte
  • Patent number: 5261100
    Abstract: A program data managing apparatus comprising memories for storing as program data a source code, technique data on a process for making the source code, and intention data on intention to make the source code; a link indicative of the mutual relationship between program data; a display for displaying the relationship between the program data using the link; a link provided to indicate the relationship between a newly developed source code and the original program data from which the new source code derives; and a display for displaying the source code developed stepwise by that link and the related program data.
    Type: Grant
    Filed: June 8, 1989
    Date of Patent: November 9, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Tsutomu Fujinami, Hirohide Haga
  • Patent number: 5239647
    Abstract: A data storage hierarchy which inherently allows for a level 1 storage file to be uniquely identified across an entire network is disclosed. A directory naming convention is employed which includes an internal identifier and a name for each subdivision of the network. Because each file can be uniquely identified across the network, a single level 1 storage space in a file space, or a directory therein, can be used for the entire network. Also, because of the inherent uniqueness of the naming system, common DASD control files otherwise required to map between level 1 storage files and their level 0 source files can be eliminated.
    Type: Grant
    Filed: September 7, 1990
    Date of Patent: August 24, 1993
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Anglin, Gregory J. Tevis, Donald P. Warren
  • Patent number: 5220439
    Abstract: There is disclosed a facsimile apparatus capable of communication of image information in the error correction mode and in the memory communication mode, the same memory means in common in both modes, thus economizing the memory capacity required in the apparatus. The communication in the error correction mode is controlled according to the available capacity of the memory.
    Type: Grant
    Filed: February 26, 1992
    Date of Patent: June 15, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takehiro Yoshida
  • Patent number: 5218706
    Abstract: A data flow processor which is so constructed that the destination node number in a program memory is stored at a relative address from, for example, a stored address of the present instruction, and a storing address for the next instruction is obtained by adding the relative address of the next instruction to the address of the present instruction. Hence, an amount of data of storing address of instruction to be executed next executed and included in the respective instructions is reduced, whereby an amount of hardware at the program memory is reduced and the memory access time is contracted.
    Type: Grant
    Filed: December 13, 1989
    Date of Patent: June 8, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinji Komori, Hirono Tsubota, Kenji Shima
  • Patent number: 5218699
    Abstract: A system for making procedure calls can be used with a network of computers. An application program on a local node calls a desired library procedure. The library procedure can be available on the local node or a remote node, and the location need not be known by the application. If the library procedure is available on a remote node, a remote router procedure communicates a procedure identifier to the remote node. The procedure is executed, and any results are returned to the locol node, to be returned to the application program.
    Type: Grant
    Filed: June 8, 1992
    Date of Patent: June 8, 1993
    Assignee: International Business Machines Corporation
    Inventors: Richard T. Brandle, Don L. Goodliffe, Donald E. Keith, Randy A. Robinette, Robert C. Sizemore, Garry J. Smithwick, Anthony J. Zappavigna
  • Patent number: 5214599
    Abstract: The invention comprises a multi-dimensional array having an inverted, self-pruning binary tree architecture. The array is capable of doing comparative and computational tasks in one clock cycle of computer operation. The computational results of the invention will be free of rounding errors. Both multiplication and division is performed utilizing base ten modulus in a non-sequential operation.
    Type: Grant
    Filed: June 19, 1989
    Date of Patent: May 25, 1993
    Inventor: David M. Magerman
  • Patent number: 5138701
    Abstract: A data communication control system for an apparatus which may be selectively equipped with two or more functional modules each having predetermined functions, the control system having a plurality of subsidiary control units respectively in control of the functional modules, a main control unit operative to communicate with each of the subsidiary control units and a data transmission network interconnecting the main control unit and each of the subsidiary control units to allow full-duplex communication therebetween, each subsidiary control unit being operative to generate mode data designating any of the functions assigned to the particular subsidiary control unit and transmit the mode data to the main control unit, wherein, when mode data designating any function is generated by one of the subsidiary control units and is sent to the main control unit, the main control unit transmits to each subsidiary control unit data designating the function designated by the mode data if the main control unit determines
    Type: Grant
    Filed: March 11, 1991
    Date of Patent: August 11, 1992
    Assignee: Minolta Camera Kabushiki Kaisha
    Inventors: Tadashi Ohira, Syuzi Maruta, Kazuhiro Araki
  • Patent number: 5127097
    Abstract: A memory writing apparatus for simultaneously writing the same data in a plurality of memories such as PROMs, the apparatus having a master function portion and slave function portions connected to the master function portion. A plurality of memories in which the desired data is to be written by the master function portion are placed in a memory placing section provided in each of the master and slave function portions. The master function portion has a buffer memory which stores the data to be written. Each of the main and slave function portions has a decision circuit for comparing the data actually written in each of the memories with the data stored in the buffer memory.
    Type: Grant
    Filed: January 9, 1991
    Date of Patent: June 30, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Masaharu Mizuta
  • Patent number: 5101344
    Abstract: A data processor having a split level control store structure, which partitions program memory into a macrocode portion and a microcode portion. The data processor contains two distinct machines, a macromachine and a micromachine. The macromachine includes an instruction sequence controller which detects the macrocode branch instruction before it is perceived by the micromachine, extracts from the branch instruction a macroaddress, and then provides the extracted macroaddress to the program memory as the next sequential instruction address. By "pipelining" the macromachine, the macromachine can "execute" the branch instruction in parallel with, and independent of, the execution by the micromachine of the preceeding instruction.
    Type: Grant
    Filed: July 25, 1990
    Date of Patent: March 31, 1992
    Assignee: Motorola, Inc.
    Inventors: Luis A. Bonet, Tim A. Williams
  • Patent number: 5101374
    Abstract: A method and apparatus for secure, fast storage and retrieval of information relative to a storage device without interactive checking is characterized by the use of a unique variable range adder. The variable range adder automatically modifies addresses to the storage device and causes data storage and retrieval to conform to the Bell and LaPadula security model, independently of software.
    Type: Grant
    Filed: May 19, 1988
    Date of Patent: March 31, 1992
    Assignee: The United States of America as represented by the Director of the National Security Agency
    Inventor: Michael Sinutko, Jr.
  • Patent number: 5095527
    Abstract: A novel array processor is provided with a plurality of local memories in each data processing element and allows these local memories to be accessed simultaneously, so that a plurality of local memories provided for each data processing element can simultaneously be accessed. The array processor is also has one local memory which is provided with a plurality of output ports for each data processing element, so that all the output ports can simultaneously be accessed, permitting the local memory unit to be accessed simultaneously through a plurality of output ports. The array processor of the present invention decreases the number of memory accesses in each data processing element, with the cumulative effect of achieving a faster speed for the entire data processing system.
    Type: Grant
    Filed: January 31, 1991
    Date of Patent: March 10, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shin-ichi Uramoto, Hideyuki Terane
  • Patent number: 5053990
    Abstract: A semiconductor flash EPROM/EEPROM device which includes a command port for receiving instruction on a data line and providing control signals to a memory for providing program and erase functions, a method to program and erase the memory. A program sequence is comprised of setting up a program command during a first write cycle, preforming a second write cycle to load address to address register and data to to a data register, programming during a program cycle and writing a program verify command during a third write cycle to verify the programmed data during a read cycle. An erase sequence is comprised of writing a setup erase command during a first write cycle, an erase command during a second write cycle providing the erasure during an erase cycle, writing the erase verify command during a third write cycle which also addresses the address of the memory and providing erase verification during a read cycle. Both the erase and program cycles provide for measured incremental erasing and programming.
    Type: Grant
    Filed: February 17, 1988
    Date of Patent: October 1, 1991
    Assignee: Intel Corporation
    Inventors: Jerry A. Kreifels, Alan Baker, George Hoekstra, Virgil N. Kynett, Steven Wells, Mark Winston