Abstract: A method for creating deep features in a Si-containing substrate for use in fabricating MEMS type devices is provided. The method includes first forming a thin Ni hardmask on a surface of a Si-containing substrate. The Ni hardmask is patterned using conventional photolithography and wet etching so as to expose at least one portion of the underlying Si-containing substrate. The at least one exposed portion of the Si-containing substrate, not containing the patterned hardmask, is then etched in a plasma that includes free radicals generated from a gaseous mixture of chlorine (Cl2), sulfur hexafluoride (SF6) and oxygen (O2). The interaction of the gas species in the plasma yields a rapid silicon etch rate that is highly selective to the Ni hardmask. The etch rate ratio of Si to Ni using the inventive method is greater than 250:1.

Abstract: A manufacturing method for an integrated circuit is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer is formed on the semiconductor substrate. A channel dielectric layer on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening. A seed layer is deposited over the barrier layer and a conductor core is deposited over the seed layer, filling the opening of in the channel dielectric layer. The seed and barrier layers are then removed above the dielectric layer. A conductive layer is then deposited, filling any voids or depressions in the conductor core, and is subsequently removed above the dielectric layer resulting in a conductive channel of uniform thickness.