Patents Examined by Johne Q. Chavis
  • Patent number: 5369747
    Abstract: An input/output channel apparatus includes a channel processing section and plural channel units transfers data between a main memory and peripheral devices in an electronic computer system. The data transfer speed is directly controlled by the data transfer speed changing mechanism in each channel unit in accordance with the operating condition of the data buffer. Further, the priority of the data chaining process is changed in accordance with the amount of data stored in the data buffer.
    Type: Grant
    Filed: July 20, 1992
    Date of Patent: November 29, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takeshi Muranoi