Patents Examined by Jonathan Backenstose
  • Patent number: 5408663
    Abstract: Methods of operating a digital computer to optimize project scheduling. Where the overall effects of a schedule, such as total project duration or cost, are unsatisfactory, the schedule is processed iteratively so that on each iteration a particular task is selected for modification according to a preset policy and data defining an aspect of that task is adjusted in a small step. A schedule is further optimized to fit the available resources by a repetitive process of assigning resources having the proper capabilities to tasks according to a predetermined order of tasks and testing whether the assigned resource can permit shortening of the task duration. Further methods select an optimum mix of capabilities to be provided by each of several resources to be hired for a project.
    Type: Grant
    Filed: November 5, 1993
    Date of Patent: April 18, 1995
    Assignee: Adrem Technologies, Inc.
    Inventor: Harold R. Miller
  • Patent number: 5361351
    Abstract: The present invention is directed to computer software compilation systems and methods which support run-time data type identification of objects in computer programming languages which support polymorphism. The present invention comprises translators, compilers, and debuggers. The compiler and translator store modified debug information in an object code file. The modified debug information contains information regarding either multiple virtual tables or concatenated virtual tables. A debug lookup table is constructed from the modified debug information. The debugger uses the debug lookup table to determine the actual data types of the objects, and to completely and accurately display and modify the objects' contents. Also, innovative type inquiry operators reference the concatenated virtual tables to determine the actual data types of the objects during run-time. The operation of the compiler, translator, and debugger is transparent to computer programmers and operators.
    Type: Grant
    Filed: September 21, 1990
    Date of Patent: November 1, 1994
    Assignee: Hewlett-Packard Company
    Inventors: Dmitry Lenkov, Shankar Unni, Michey Mehta, Mark W. McDowell, Manoj Dadoo, Bruno Melli
  • Patent number: 5361352
    Abstract: In a parallel computer, a method for controlling a debugging process includes the steps of registering identifiers of plural processors into an execution waiting queue in a predetermined order; executing a corresponding program by each of the processors in an order until it is brought into either a waiting state or an end state; registering the identifier of the processor of the waiting state as a last element of the execution waiting queue; and repeating the executing step until there are no executable processors. A program having a bug is determined from the identifiers left in the execution waiting queue. Further, the debugging-process control method further includes outputting trace data during execution of the executing step, the program having the bug is determined from this trace data.
    Type: Grant
    Filed: November 26, 1990
    Date of Patent: November 1, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Kyoko Iwasawa, Yoshikazu Tanaka
  • Patent number: 5355495
    Abstract: A method of performing state transition control in an electronic apparatus in which it is first determined whether a functional transition request has occurred. A main routine is performed if no transition request has occurred and a state transition processing is performed if a transition request has occurred. By calling the main routine as a subroutine during the state transition processing, interrupt processing and separated stack processing are avoided.
    Type: Grant
    Filed: January 29, 1992
    Date of Patent: October 11, 1994
    Assignee: Sony Corporation
    Inventor: Yuriko Kishitaka