Patents Examined by Jonathan Hall Backenstose
  • Patent number: 5440695
    Abstract: A combination input/output (I/O) module for a microprocessor based device is disclosed. The combination I/O module includes a combination point which is operable as either an input point adapted for coupling to an input device, an output point adapted for coupling to an output device, or both. The combination I/O module provides continuous sensing of the presence or absence of the output device. The combination I/O module includes a triac and provides for continuous sensing of the conductive state of the triac.
    Type: Grant
    Filed: March 16, 1994
    Date of Patent: August 8, 1995
    Assignee: AEG Schneider Automation, Inc.
    Inventors: Donald R. Janke, Richard R. Sabroff
  • Patent number: 5432942
    Abstract: The present invention relates to a tool, in the form of a computer program, for analyzing computer programs by extracting and converting information about data structures in the program, storing the information about the extracted data structures in a series of random access files forming a relational database, and displaying the stored information as desired. The method for analyzing the computer program using the tool of the present invention includes the steps of inputting a computer program to be analyzed, extracting and converting at least one data structure such as a variable or a table from the program, storing information about the data structure(s) in one or more random access files, and displaying the stored information in either a textual or graphical mode. The program to be analyzed is preferably inputted into the program of the present invention in the form of one or more source code files.
    Type: Grant
    Filed: June 10, 1993
    Date of Patent: July 11, 1995
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Joshua P. Trainer
  • Patent number: 5430875
    Abstract: The present invention provides a method and apparatus for event handling which addresses the problems associated with the prior art, including those problems discussed above, by delegating, for example to the system software, the task of determining whether particular combinations of events and other conditions have occurred. The present invention provides applications with a mechanism for establishing a template, called an event qualifier network, which monitors the occurrence of an event or specific combination of events, along with virtually any other qualifying condition specified by the application. In response to the occurrence of such events and conditions, the event qualifier network notifies the application that its "desired event" has occurred, whereupon the application may then take the appropriate action. Event qualifier networks can be quickly and simply built to monitor for arbitrarily complex combinations of events.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: July 4, 1995
    Assignee: Kaleida Labs, Inc.
    Inventor: Yin-Shur D. Ma
  • Patent number: 5430877
    Abstract: Two mobile communications handset terminals for a cellular telephone system each incorporate a microprocessor for controlling the operating components of the terminal. Each microprocessor operates under control of software stored in a FLASH Eprom. When the two units are interconnected by a special cable loom, a 12 volt supply of one of the units is applied to the FLASH Eprom of that unit, switching it into a reprogramming mode. This 12 volt supply is also applied via an output terminal to the FLASH Eprom of the other unit which is thus likewise switched into a reprogramming mode. Via the cable loom, each handset compares the grade of the software stored in its FLASH Eprom with the grade of software stored in the other's FLASH Eprom. The handset storing the higher grade software then assumes a MASTER mode and the other one assumes a SLAVE mode. The lower grade software in the SLAVE handset is erased from its FLASH Eprom and replaced with the higher grade software from the MASTER hand set.
    Type: Grant
    Filed: July 20, 1993
    Date of Patent: July 4, 1995
    Assignee: Orbitel Mobile Communications Limited
    Inventor: Rowan Naylor
  • Patent number: 5418958
    Abstract: During code generation, a routine is first decomposed into regions. Then, starting from the highest plateau, i.e. the inner most control flow level, the interference graph of each region in a plateau is colored individually. Neighboring regions of the plateau are then combined by connecting the colored nodes of the interference graphs that are live at region boundaries. If connecting the interference graphs render the connected interference graph uncolorable, colored nodes that are live at region boundaries are connected by introducing register to register move or spilling the node. When all neighboring regions of a plateau are combined, the plateau collapses into a region of the lower level plateau. The process is repeated until all plateaus are collapsed and the regions of the base plateau are colored and combined together. Registers are then allocated to the colored nodes.
    Type: Grant
    Filed: July 15, 1992
    Date of Patent: May 23, 1995
    Assignee: Sun Microsystems, Inc.
    Inventor: Kurt J. Goebel
  • Patent number: 5414852
    Abstract: A data processing system include a plurality of data objects which are accessible by application programs through a system level interface. Each data object has an associated user access list. In addition, each object has at least one key indicating which applications can access that object. The key is preferably maintained in a protected storage area, accessible only by the low level system interface. Both the application identifier key and the user who invoked that application must match the identifier information in the data object for access to be allowed to that object. If an unauthorized user attempts access to the data object through the correct application, or an authorized user attempts access through an incorrect application, access to the data object will be denied by the low level interface.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: May 9, 1995
    Assignee: International Business Machines Corporation
    Inventors: Paul H. Kramer, Kay A. Tate
  • Patent number: 5410705
    Abstract: A method for a computer compiler for an object-oriented programming language for implementing virtual functions and virtual base classes is provided. In preferred embodiments of the present invention, the data structure layout of an object includes a virtual function table pointer, a virtual base table pointer, occurrences of each non-virtual base class, the data members of the class, and occurrences of each virtual base class. If a class introduces a virtual function member and the class has a non-virtual base class with a virtual function table pointer, then the class shares the virtual function table pointer of the non-virtual base class that is first visited in a depth-first, left-to-right traversal of the inheritance tree. In preferred embodiments of the present invention, each instance of a given class shares a set of virtual function tables and virtual base tables for that class.
    Type: Grant
    Filed: December 7, 1993
    Date of Patent: April 25, 1995
    Assignee: Microsoft Corporation
    Inventors: David T. Jones, Martin J. O'Riordan, Mark J. Zbikowski
  • Patent number: 5404532
    Abstract: A new event forwarding discriminator (EFD) EFD named the persistent/impervious event forwarding discriminator (PI EFD) is described herein. The PI EFD is monitored by the agent infrastructure in such a way that if the agent goes down, and thus the PI EFD goes down, the agent rebuilds or restores the PI EFD with all its attributes. The PI EFD immediately creates an event notification indicating a create PI EFD event has occurred. This event notification is of the type passed by the PI EFD to the manager. The manager then knows the poll its other EFDs at the agent and recreate them as necessary.To foil rogue managers, the PI EFD can not be deleted by other managers. Also, the PI EFD has limited attributes that can be changed. A rogue manager can only add himself to the destination list; it can not otherwise change the attributes of the PI EFD.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: April 4, 1995
    Assignee: International Business Machines Corporation
    Inventors: Wade C. Allen, James L. Panian, Paul J. Reder
  • Patent number: 5404553
    Abstract: A microprocessor which can execute a test and set instruction for an exclusive control by combination of a few simple instructions, and data flow microprocessor which realizes high operation performance mainly in vector operation by reading out of data to be operated, writing in operation result and executing memory access in short time period and in parallel, and whose running efficiency of program is high in multi-processor construction.
    Type: Grant
    Filed: January 2, 1992
    Date of Patent: April 4, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinji Komori, Hidehiro Takata, Toshiyuki Tamura, Fumiyasu Asai, Hirono Tsubota
  • Patent number: 5404526
    Abstract: A method is provided for overcoming the slow speed of accessing machine state information from a device under test using boundary scan technology. The method minimizes the total number of words sent over the lengthy communications path by filtering out intermediary data. The method enables transfers of results to take place while other boundary scan circuitry commands are executing. Firmware is provided that transforms a boundary scan circuitry controller into a debug controller. Building the debug functions into the system makes it possible to have debug capability from module level integration all the way to system level integration.
    Type: Grant
    Filed: October 20, 1992
    Date of Patent: April 4, 1995
    Inventors: Daniel G. Dosch, Otis A. Bundy, Robert Whyms, III
  • Patent number: 5402431
    Abstract: A system for innately monitoring a computer system. All address and data signals transferred over the system bus. Certain ones of the address signals are selected as related to the operating conditions of the computer system. A data filter selects data signals which correspond to the selected address signals and the selected address and data signals related to operating conditions of the computer system are then stored, either in a register if the selected address and data signals are composed of dynamic information requiring frequent status updates or in a first-in, first-out memory, when the selected address and data signals are composed of less dynamic information.
    Type: Grant
    Filed: November 23, 1993
    Date of Patent: March 28, 1995
    Assignee: Compaq Computer Corporation
    Inventors: Said S. Saadeh, Scott C. Farrand, Thomas J. Hernandez, Paul R. Fulton, Richard P. Mangold, Richard A. Stupek, James E. Barron, Richard A. Kunz, Dinesh K. Sharma
  • Patent number: 5396626
    Abstract: A method and system for adding components (documents, tools, fonts, libraries, etc.) to a computer system without running an installation program. A location framework is employed to locate components whose properties match those specified in a search criteria. The framework receives notification from the system when components whose properties match the search criteria are added to or removed from the system.
    Type: Grant
    Filed: August 4, 1993
    Date of Patent: March 7, 1995
    Assignee: Taligent, Inc.
    Inventor: Frank T. Nguyen
  • Patent number: 5394547
    Abstract: An improved data processing system and operating system having a selectable scheduler. An operating system kernel is provided having a standardized interface for permitting the installation of a selected one of multiple diverse schedulers for use in different environments. System resources which may include memory, input/output devices and file systems are thereafter optimally allocated for a selected set of applications and a particular environment within the data processing system by permitting a user to install a selected one of the multiple schedulers which directly controls allocation of processor time, thereby indirectly allocating system resources. The standardized interface within the operating system kernel is preferably provided utilizing a kernel extension mechanism and installation of a selected one of the multiple schedulers may occur automatically, in response to system initialization, or may be selectively achieved during operation of the data processing system.
    Type: Grant
    Filed: December 24, 1991
    Date of Patent: February 28, 1995
    Assignee: International Business Machines Corporation
    Inventors: Joseph A. Correnti, Ralph M. Pipitone, Michael W. Thomas