Patents Examined by Jordan J. Flynn
  • Patent number: 6717219
    Abstract: In a Bi-CM0S ESD protection structure, the holding voltage is increased by a desired amount by including a NBL of chosen length. The positioning of the NBL may be adjusted to adjust the I-V characteristics of the structure. Dual voltage capabilities may be achieved by providing two laterally spaced p-regions in a n-material and defining a n+ region and a p+ region in each of the p-regions to define I-V characteristics that are similar to those defined by a SCR device in a positive direction, but, in this case, having those characteristics in both directions. Over and above the NBL position being adjusted relative to the p-regions, the two p-regions may vary in doping level, and dimensions to achieve different I-V characteristics for the device in the positive and negative directions.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: April 6, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Vashchenko, Ann Concannon, Peter J. Hopper, Marcel ter Beek