Patents Examined by Jordan M Klein
  • Patent number: 12009310
    Abstract: A conductive plate includes a first slit formed in the space between a first chip area and a second chip area, a second slit formed in the space between the first chip area and a terminal area, and a third slit formed in the space between the second chip area and the terminal area. The first slit is a continuous line that penetrates through the conductive plate, whereas the second and third slits are continuous lines that do not penetrate through the conductive plate.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: June 11, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Kenshi Terashima
  • Patent number: 11996493
    Abstract: The present disclosure provides a light-emitting module and a display apparatus thereof. The light-emitting module includes a circuit substrate which includes a first surface and a second surface opposite to the first surface. The first surface includes a plurality of conductive channels, and the second surface includes a plurality of conductive pads. A plurality of light-emitting groups is arranged in a matrix on the first surface. Each of the light-emitting groups includes a red light-emitting diode chip, a green light-emitting diode chip, and a blue light-emitting diode chip. An electric component is disposed on the first surface and located in the light-emitting groups matrix. A translucent encapsulating component covers the plurality of light-emitting groups and the electric component. Wherein, the light-emitting groups matrix comprises m columns and n rows.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: May 28, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Jen-Chieh Yu, Chun-Wei Chen
  • Patent number: 11985878
    Abstract: Embodiments of a display device are described. A display device includes first and second sub-pixels. The first sub-pixel includes a first light source having a multi-layer stack and a first substrate configured to support the first light source. The multi-layer stack includes an organic phosphor film or a quantum dot (QD) based phosphor film configured to emit a first light having a first peak wavelength. The first substrate includes a first control circuitry configured to independently control the first light source. The second sub-pixel includes a second light source and a second substrate configured to support the second light source. The second light source has a microLED or a miniLED configured to emit a second light having a second peak wavelength that is different from the first peak wavelength. The second peak wavelength can be in the blue wavelength region of the visible spectrum. The second substrate includes a second control circuitry configured to independently control the second light source.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: May 14, 2024
    Assignee: SHOEI CHEMICAL INC.
    Inventors: Jesse R. Manders, Brian H. Berkeley
  • Patent number: 11967585
    Abstract: A display device includes a substrate, a first electrode, and a second electrode spaced from each other on the substrate, a first insulating layer on the first electrode, a first light emitting element between the first electrode and the second electrode, a second light emitting element on the first insulating layer and spaced from the first light emitting element, and a second insulating layer on the first insulating layer and covering at least a portion of the second light emitting element, wherein the first insulating layer includes at least one first opening penetrating the first insulating layer to expose a portion of the first electrode, the second insulating layer includes at least one second opening penetrating the second insulating layer to expose a portion of the first insulating layer, the at least one first opening and the at least one second opening do not overlap each other.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: April 23, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Bum Soo Kam, Eui Kang Heo
  • Patent number: 11961790
    Abstract: A semiconductor module includes a conductive substrate, a plurality of first semiconductor elements, and a plurality of second semiconductor elements. The conductive substrate includes a first conductive portion to which the plurality of first semiconductor elements are electrically bonded, and a second conductive portion to which the plurality of second semiconductor elements are electrically bonded. The semiconductor module further includes a first input terminal, a second input terminal, and a third input terminal that are provided near the first conductive portion. The second input terminal and the third input terminal are spaced apart from each other with the first input terminal therebetween. The first input terminal is electrically connected to the first conductive portion. A polarity of the first input terminal is set to be opposite to a polarity of each of the second input terminal and the third input terminal.
    Type: Grant
    Filed: August 21, 2023
    Date of Patent: April 16, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Kenji Hayashi, Kohei Tanikawa, Ryosuke Fukuda
  • Patent number: 11961876
    Abstract: A display apparatus includes a display substrate, and light emitting devices arranged on an upper surface of the display substrate. At least one of the light emitting devices includes a first LED unit including a first light emitting stack, a second LED unit including a second light emitting stack, and a third LED unit including a third light emitting stack. Each of the first to third light emitting stacks includes a first conductivity type semiconductor layer and a second conductivity type semiconductor layer. the first conductivity type semiconductor layer and the second conductivity type semiconductor layer in each of the first to third light emitting stacks are stacked in a horizontal direction with respect to the upper surface of the display substrate. At least one of the second conductivity type semiconductor layers in the first to third light emitting stacks is divided into two regions.
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: April 16, 2024
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Chung Hoon Lee, So Ra Lee
  • Patent number: 11955389
    Abstract: A method of determining the reliability of a high-voltage PMOS (HVPMOS) device includes determining a bulk resistance of the HVPMOS device, and evaluating the reliability of the HVPMOS device based on the bulk resistance.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Tse-Hua Lu
  • Patent number: 11955451
    Abstract: A semiconductor module includes: a first conductive portion; a second conductive portion spaced from the first conductive portion in a first direction; first semiconductor elements electrically bonded to the first conductive portion and mutually spaced in a second direction perpendicular to the first direction; and second semiconductor elements electrically bonded to the second conductive portion and mutually spaced in the second direction. The semiconductor module further includes: a first input terminal electrically connected to the first conductive portion; a second input terminal of opposite polarity to the first input terminal; and an output terminal opposite from the two input terminals in the first direction and electrically connected to the second conductive portion.
    Type: Grant
    Filed: August 29, 2023
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Kenji Hayashi, Kohei Tanikawa, Ryosuke Fukuda
  • Patent number: 11956941
    Abstract: A manufacturing method for memory includes providing a substrate; forming a first isolation layer on the substrate; forming a first mask layer on the first isolation layer; forming a second isolation layer on the first mask layer and part of the first isolation layer; forming a second mask layer on the second isolation layer; removing part of the second mask layer and part of the second isolation layer; removing the first mask layer and the remaining second mask layer; forming a third mask layer on the first isolation layer and the remaining second isolation layer; removing part of the third mask layer; and etching the remaining part of the second isolation layer and the first isolation layer below the second isolation layer, by taking the remaining third mask layer as a mask.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 9, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Jiayun Zhang
  • Patent number: 11955452
    Abstract: A semiconductor module includes: a first conductive portion; a second conductive portion spaced from the first conductive portion in a first direction; first semiconductor elements electrically bonded to the first conductive portion and mutually spaced in a second direction perpendicular to the first direction; and second semiconductor elements electrically bonded to the second conductive portion and mutually spaced in the second direction. The semiconductor module further includes: a first input terminal electrically connected to the first conductive portion; a second input terminal of opposite polarity to the first input terminal; and an output terminal opposite from the two input terminals in the first direction and electrically connected to the second conductive portion.
    Type: Grant
    Filed: August 29, 2023
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Kenji Hayashi, Kohei Tanikawa, Ryosuke Fukuda
  • Patent number: 11955398
    Abstract: A semiconductor device includes: an insulating circuit substrate; a semiconductor element including a first main electrode bonded to a first conductor layer of the insulating circuit substrate via a first bonding material, a semiconductor substrate deposited on the first main electrode, and a second main electrode deposited on the semiconductor substrate; and a resistive element including a bottom surface electrode bonded to a second conductor layer of the insulating circuit substrate via a second bonding material, a resistive layer with one end electrically connected to the bottom surface electrode, and a top surface electrode electrically connected to another end of the resistive layer, wherein the first main electrode includes a first bonded layer bonded to the first bonding material, the bottom surface electrode includes a second bonded layer bonded to the second bonding material, and the first bonded layer and the second bonded layer have a common structure.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: April 9, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Eri Ogawa
  • Patent number: 11955496
    Abstract: The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type. A BDTI structure is disposed between adjacent pixel regions and extending from the back-side of the image sensor die to a position within the photodiode doping layer. The BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer. The doped liner lines a sidewall surface of the dielectric fill layer.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ta Wu, Kuo-Hwa Tzeng, Yeur-Luen Tu
  • Patent number: 11948925
    Abstract: A light emitting device includes a substrate including first, second, third and fourth wiring portions on a top surface of a base member and arrayed in a first direction, and a connection wiring portion connecting the second and third wiring portions. The connection wiring portion includes first and second connection ends respectively connected with the second and third wiring portions, and a connection central portion connecting the first and second connection ends and having a maximum width in a second direction different from each of a maximum width of the first connection end and a maximum width of the second connection end. In the second direction, at least a part of the connection wiring portion has a width narrower than each of a maximum width of the second wiring portion and a maximum width of the third wiring portion.
    Type: Grant
    Filed: October 4, 2022
    Date of Patent: April 2, 2024
    Assignee: NICHIA CORPORATION
    Inventors: Takuya Nakabayashi, Tadaaki Ikeda, Tetsuya Ishikawa
  • Patent number: 11942582
    Abstract: A light-emitting module including a substrate, a light-emitting device disposed on the substrate, a lens, and an optical sensor. The light-emitting device includes at least one light-emitting element and a light-transmissive member disposed on a light extraction surface of the at least one light-emitting element. The lens is disposed apart from the light-emitting device at a position where the lens faces the light-emitting device. The optical sensor has an upper surface including a light-receiving surface to receive light through the lens and is disposed on the substrate at a position where at least a part of the light-receiving surface faces the lens. A center of the light-emitting device is located at a center of the lens in a plan view.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: March 26, 2024
    Assignee: NICHIA CORPORATION
    Inventors: Saiki Yamamoto, Shinya Matsuoka
  • Patent number: 11935820
    Abstract: An object is to suppress a lift of an external terminal when an external force is applied, thereby improving the reliability of a semiconductor device. A heat radiating plate 10 having on one main surface a circuit area 54 in which a semiconductor element 50 is arranged, a pair of terminals 31 and 32 connected to the semiconductor element 50, a resin housing 20 that covers the circuit area 54 of the heat radiating plate 10 to seal the semiconductor element 50, and has a terminal surface 22 formed on an upper surface, a pair of side surfaces in the longitudinal direction, and a pair of front and rear surfaces in the lateral direction, are included. The resin housing 20 has a pair of bending contact portions 22e and 23e that come into respectively contact with the pair of terminals 31 and 32 to define bending positions of the terminals 31 and 32. The pair of bending contact portions 22e and 23e are formed to have different heights.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: March 19, 2024
    Assignee: SANSHA ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Tomohiro Yamanaka, Yoichi Makimoto
  • Patent number: 11935882
    Abstract: A semiconductor device including a static random access memory (SRAM) device includes a first SRAM array including a first plurality of bit cells arranged in a matrix; a second SRAM array including a second plurality of bit cells arranged in a matrix; and a plurality of abutting dummy cells disposed between the first SRAM array and the second SRAM array. Each of the plurality of abutting dummy cells includes a plurality of dummy gate electrode layers and a plurality of dummy contacts. The semiconductor device further includes a first-type well continuously extending from the first SRAM array to the second SRAM array. The first-type well is in direct contact with portions of the plurality of dummy contacts.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Jhon Jhy Liaw
  • Patent number: 11923390
    Abstract: A detection module for a display device includes: a substrate; a detector disposed on the substrate to detect an external signal; a sensor driving circuit disposed on the substrate to drive the detector; and a light shielding layer to block an external light from entering the sensor driving circuit and to receive a light blocking voltage.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: March 5, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Junghak Kim, Youngsik Kim, Kyowon Ku, Jaehyung Jo
  • Patent number: 11923270
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor chip having a first electrode on a first surface, a metal plate, and a first conductive bonding sheet that is disposed between the first surface of the semiconductor chip and the metal plate and bonds the first electrode to the metal plate.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: March 5, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsuya Kobayashi, Fumiyoshi Kawashiro, Hisashi Tomita
  • Patent number: 11923262
    Abstract: An electrical apparatus includes a semiconductor element, conductors and a covering resin. The conductors are connected to the semiconductor element. At least one of the conductors extends in a first direction. The covering resin covers the semiconductor element and a portion of each of the conductors. The conductors respectively include covering portions and exposing portions. Each of the covering portions is covered by the covering resin. Each of the exposing portions is exposed from the covering resin. The conductors are aligned in a second direction. Two of the exposing portions closest to each other are spaced apart in each of the second direction and a third direction. The third direction is perpendicular to the first direction and the second direction. A shortest separation distance between two closest covering portions is shorter than a shortest separation distance between two closest exposing portions.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: March 5, 2024
    Assignee: DENSO CORPORATION
    Inventor: Yasushi Furukawa
  • Patent number: 11910611
    Abstract: A nonvolatile memory device includes a substrate including a cell region and a peripheral circuit region, a stacked structure on the cell region, the stacked structure including a plurality of gate patterns separated from each other and stacked sequentially, a semiconductor pattern connected to the substrate through the stacked structure, a peripheral circuit element on the peripheral circuit region, a first interlayer insulating film on the cell region and the peripheral circuit region, the first interlayer insulating film covering the peripheral circuit element, and a lower contact connected to the peripheral circuit element through the first interlayer insulating film, a height of a top surface of the lower contact being lower than or equal to a height of a bottom surface of a lowermost gate pattern of the plurality of gate patterns on the first interlayer insulating film.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: February 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong Hoon Jang, Woo Sung Yang, Joon Sung Lim, Sung Min Hwang