Patents Examined by Joseph E. Ralys
  • Patent number: 6085257
    Abstract: An improved transceiver that is tightly integrated into an enhanced receiving chip for a computer monitor. The transceiver includes a receiver having a first input port for receiving serialized data, a first output port for transmitting deserialized data to the transceiver, and a second input port adapted for receiving feedback data forwarded from a sensor to an audio and video control unit. The serialized data comprises video, audio and control data. The transceiver further comprises a receiver operably coupled between the first input port and the first output port, as well as a timing generator coupled to recover a clock signal from the serialized data and to synchronize the deserialized data from the recovered clock. The transceiver also includes a transmitter with a third input port for receiving parallel data and a second output port for transmitting a serial data stream. The parallel data are received by the third input port concurrently with the serialized data being received by the first input port.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: July 4, 2000
    Assignee: LSI Logic Corporation
    Inventors: Francois Ducaroir, Karl S. Nakamura, Michael O. Jenkins