Patents Examined by Joseph O Schell
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Patent number: 12292808Abstract: This application relates to apparatus and methods for simultaneously servicing a plurality of computing devices. In one example, a testing system includes a testing frame with a plurality of cabinets, each of the plurality of cabinets housing a computing device under test. Further, the testing frame includes a control cabinet housing a testing computing device, where the testing computing device is communicatively coupled, through one or more hubs located in one or more networking cabinets of the testing frame, to each of the plurality of computing devices under test. The testing frame may also include a bracket that secures a monitor and a keyboard, where the monitor and keyboard are communicatively coupled to the testing computing device. The testing computing device can simultaneously service the plurality of computing devices, such as by causing the deletion of user data, the loading of software, and the testing of various functions.Type: GrantFiled: December 7, 2022Date of Patent: May 6, 2025Assignee: Communications Test Design, Inc.Inventors: Austin Gunter, Patrick Dameron
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Patent number: 12282391Abstract: Systems and methods include a remote access controller of an IHS (Information Handling System) that provides remote management of the IHS. The remote access controller initiates an update of firmware used to operate a hardware component of the IHS by transmitting a firmware image to the hardware component via a first signaling pathway connecting the remote access controller to the hardware component. The remote access controller detects a failure in transmission of the firmware image to the hardware component via the first signaling pathway and identifies a second signaling pathway connecting the remote access controller to the hardware component. The remote access controller resumes transmission of the firmware image to the hardware component via the second signaling pathway and the firmware used to operate the hardware component is updated using the transmitted firmware image.Type: GrantFiled: September 26, 2022Date of Patent: April 22, 2025Assignee: Dell Products, L.P.Inventors: Manjunath Vishwanath, Rama Rao Bisa, Pavan Kumar Gavvala, Manjunath Am, Mahesh Babu Ramaiah, Naveen Karthick Chandrasekaran, Darshan Hebbar, Shantanu Kumar Pradhan
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Patent number: 12282379Abstract: Techniques for identifying faults in a collaborative computing system including a plurality of disparate, geographically separated computing systems are described herein. An intelligent monitoring (IM) server computing system may receive data from the plurality of computing devices and may monitor the health of the collaborative computing system. The IM server computing system may analyze the data and identify one or more faults associated with a portion of the collaborative system (e.g., an associated computing device, platform, network, etc.). In some examples, the IM server computing system may be configured to identify potential future faults associated with the portion of the collaborative system. Based on the fault, the IM server computing device may determine an action to take to remedy the fault and/or prevent the potential future fault. The IM server computing device may either automatically perform the action or send a notification to the associated computing system to perform the action.Type: GrantFiled: December 4, 2023Date of Patent: April 22, 2025Assignee: State Farm Mutual Automobile Insurance CompanyInventors: Michael Shawn Jacob, Benjamin D. Schappaugh, William Guthrie, Frank Matthew McCully, Timothy J. Nickel, Brian W. Batronis, Robert D. Rariden
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Patent number: 12282400Abstract: A system and methods for contact center fault diagnostics, comprising a diagnostic engine and test cases used for testing components and services in a contact center, designed to operate on a contact center with a specified test campaign, allowing a contact center's various services and systems to be tested either internally or externally in an automated fashion with specified testcases being used to specify the format and expectations of a specific test, with reports of failures and points of failure being made available to system administrators.Type: GrantFiled: April 26, 2024Date of Patent: April 22, 2025Assignee: Cyara Solutions Pty Ltd.Inventors: Mark Ryan, Chris Ryan
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Patent number: 12277031Abstract: An apparatus comprises at least one processing device that includes a processor coupled to a memory. The at least one processing device is configured to maintain for a first storage system one or more index tables characterizing data archived from the first storage system to at least a second storage system, to receive a request to archive a particular data item from the first storage system to the second storage system, to access, responsive to the received request, a corresponding one of the one or more index tables characterizing data archived from the first storage system to at least the second storage system, and to control archiving of the particular data item based at least in part on one or more entries of the corresponding one of the one or more index tables. Archiving of the particular data item is illustratively controlled using content-based identifiers in the corresponding index table.Type: GrantFiled: April 19, 2023Date of Patent: April 15, 2025Assignee: Dell Products L.P.Inventors: Narayan Behera, Sameer P. Mohod
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Patent number: 12277028Abstract: An apparatus comprises a storage configured to store data items associated with error correction codes (ECCs); data retrieval circuitry responsive to a data retrieval request specifying a retrieval address to retrieve a retrieved data item and an associated ECC from a storage location corresponding to the retrieval address; and ECC decoding circuitry to generate a syndrome value by performing an ECC decoding operation on a decoding input value comprising data bits of the retrieved data item, code bits of the associated ECC, and address bits of the retrieval address, and to determine based on the syndrome value whether an error condition has occurred. Each bit of the syndrome value depends on a different combination of bits of the decoding input value. For each data bit of the decoding input value, an odd number of bits of the syndrome value depend on that data bit. For each address bit of the decoding input value, an even number of bits of the syndrome value depend on that address bit.Type: GrantFiled: August 3, 2023Date of Patent: April 15, 2025Assignee: Arm LimitedInventors: Siddharth Gupta, Antony John Penton
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Patent number: 12265459Abstract: Implementations of this disclosure provide an anomaly detection system that automatically tunes parameters of a forecasting detector that detects anomalies in a metric time series. The anomaly detection system may implement a three-stage process where a first stage tunes a historical window parameter, a second stage tunes a current window parameter, and a third stage tunes the number of standard deviation different from historical mean required to trigger an alert. The tuned historical window length determined by the first stage may be provided to the second stage as input. Both the tuned historical window length and the tuned current window length may be provided to the third stage as input as use in determining the tuned number of standard deviations.Type: GrantFiled: January 31, 2023Date of Patent: April 1, 2025Assignee: Splunk LLCInventors: Joseph Ari Ross, Abraham Starosta
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Patent number: 12259797Abstract: A data synchronization method for a host machine and a backup machine of a station application server includes the following steps: receiving initial data sent by the host machine and storing the initial data in a backup machine local file by the backup machine to realize data synchronization between the host machine and the backup machine in an initial state after establishing a communication between the host machine and the backup machine; and receiving message data sent by a station terminal device in real time and storing the message data in a host machine local file, then sending the message data to the backup machine by way of polling, and receiving the message data and storing the message data in the backup machine local file by the backup machine to realize data synchronization between the host machine and the backup machine.Type: GrantFiled: September 24, 2021Date of Patent: March 25, 2025Assignee: CASCO SIGNAL CO., LTD.Inventors: Yangjie Zhao, Zhenjie Chen, Yahui Cao, Yingtao Lu, Yafei Wang
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Patent number: 12242360Abstract: A method for performing data access management of a memory device in predetermined communications architecture to enhance sudden power off recovery (SPOR) of page-group-based redundant array of independent disks (RAID) protection with aid of suspendible serial number and associated apparatus are provided. The method may include: utilizing the memory controller to write preceding data and metadata thereof into at least one set of preceding pages in a first active block to make the metadata carry at least one preceding serial number; writing dummy data and other metadata into at least one set of dummy pages in the first active block to make the other metadata carry at least one suspended serial number which is equal to a last serial number among the at least one preceding serial number; and utilizing the memory controller to write subsequent data and metadata thereof to make it carry at least one subsequent serial number.Type: GrantFiled: May 26, 2023Date of Patent: March 4, 2025Assignee: Silicon Motion, Inc.Inventors: Jie-Hao Lee, Chun-Ju Chen, Po-Ting Chen
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Patent number: 12222851Abstract: A computer-implemented method for a service mesh to simulate and address a situation in which there are several transactions among services with an asynchronous relationship between the services is provided. The computer-implemented method includes identifying that the situation occurs with a response provided to a user upon a user invocation of one of the services, analyzing the situation to determine that the asynchronous relationship between the services caused an error in at least one of the several transactions, recording data of a next user invocation of the one of the services, modifying the data of the next user invocation of the one of the services to correct the error and to thereby generate modified data, simulating an execution of the next user invocation of the service using the modified data and confirming that the modified data corrects the error based on results of the simulating.Type: GrantFiled: May 10, 2023Date of Patent: February 11, 2025Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Yue Wang, Xinpeng Liu, Wei Wu, Peng Hui Jiang, Xiao Ling Chen
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Patent number: 12216531Abstract: A learning unit of an operation management system extracts, according to performance information and event logs of a device to be managed, a first abnormality occurrence period using the performance information, calculates a first TF-IDF vector created using event logs in the first abnormality occurrence period, and stores at least the first TF-IDF vector as a learning model. A recommendation section calculates, using the performance information and event logs newly acquired by the device, a second abnormality occurrence period and a second TF-IDF vector, calculates a first degree of similarity between the first TF-IDF vector in the learning model and the second TF-IDF vector, and outputs recommendation information regarding the calculated second abnormality occurrence period when the first degree of similarity is equal to or less than a predetermined value.Type: GrantFiled: January 31, 2023Date of Patent: February 4, 2025Assignee: NEC Platforms, Ltd.Inventors: Ryo Suzuki, Ken Tonari
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Patent number: 12210433Abstract: A system and method is disclosed for automatically triggering a quality event filing in a monitored area, comprising: receiving incoming data from a plurality of connected devices in the monitored area, the incoming data including environmental data of the monitored area and user data of at least one user in the monitored area; determining, by the at least one processor, whether the incoming data is indicative of the occurrence of at least one quality event in the monitored area; and upon a determination that the incoming data is indicative of at least one quality event, generating, by the at least one processor, a quality event form with form data pre-filled, and transmitting the quality event form to a graphical user interface of a user device of at least one user in the monitored area.Type: GrantFiled: December 15, 2022Date of Patent: January 28, 2025Assignee: HONEYWELL INTERNATIONAL INC.Inventor: Ankit Singh
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Patent number: 12210408Abstract: An apparatus has tag checking circuitry responsive to a target address to: identify a guard tag stored in a memory system in association with a block of one or more memory locations, the block containing a target memory location identified by the target address, perform a tag check based on the guard tag and an address tag associated with the target address, and in response to detecting a mismatch in the tag check, perform an error response action. The apparatus also has tag mapping storage circuitry to store mapping information indicative of a mapping between guard tag values and corresponding address tag values. The tag checking circuitry remaps at least one of the guard tag and the address tag based on the mapping information stored by the tag mapping storage circuitry to generate a remapped tag for use in the tag check.Type: GrantFiled: May 27, 2021Date of Patent: January 28, 2025Assignee: Arm LimitedInventors: Jacob Paul Bramley, Georgia Kouveli, Martyn Maurice Capewell, Pierre Denis Michel Langlois
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Patent number: 12210427Abstract: A method for circuit modification for fault mitigation including: obtaining a netlist defining a circuit; inserting at least one saboteur circuit into a first net of the netlist; configuring an FPGA to implement the first net and the at least one saboteur circuit; activating a first of the at least one saboteur circuits; determining whether the first net experiences a fault; and upon determining that the first net experiences a fault, modifying the first net by inserting at least one redundant circuit into the first net.Type: GrantFiled: April 25, 2023Date of Patent: January 28, 2025Assignee: National Technology & Engineering Solutions of Sandia, LLCInventors: Jason Hamlet, Tom Mannos
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Patent number: 12197302Abstract: The present disclosure provides a prediction method and an apparatus for a faulty GPU, an electronic device and a storage medium. The method includes: acquiring parameter information of each GPU in a plurality of GPUs to obtain a parameter information set; inputting the parameter information set into a plurality of pre-trained prediction models to obtain a prediction result corresponding to each prediction model; and determining a faulty GPU from the plurality of GPUs according to the prediction result.Type: GrantFiled: December 15, 2023Date of Patent: January 14, 2025Assignee: LEMON INC.Inventors: Zhichao Li, Heting Liu, Zherui Liu, Chuanxiong Guo, Jian Wang
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Patent number: 12197766Abstract: Methods for operating a memory system are disclosed herein. In one embodiment, a method comprises receiving first data to be written at a logical address of a memory array, storing the first data at a first physical address corresponding to the logical address, and remapping the logical address to a second physical address, for example, using a soft post package repair operation. The method can further include receiving second data different from the first data to be written at the logical address, storing the second data at the second physical address, and remapping the logical address to the first physical address. In some embodiments, the method can comprise storing first and second ECC data corresponding to the first and second data, respectively. The method can further comprise outputting the first data and/or the second ECC data in response to a read request corresponding to the logical address.Type: GrantFiled: November 2, 2021Date of Patent: January 14, 2025Assignee: Micron Technology, Inc.Inventors: Randall J. Rooney, Matthew A. Prather, Neal J. Koyle
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Patent number: 12189474Abstract: A controller and an operating method of the controller may calculate a first syndrome weight which is syndrome weight for first read data, calculate a second syndrome weight which is syndrome weight for second read data, and determine first reliability data and second reliability data based on the first syndrome weight and the second syndrome weight. The first read data may be read from a memory area using a first read bias and the second read data may be read from the memory area using a second read bias different from the first read bias.Type: GrantFiled: September 29, 2022Date of Patent: January 7, 2025Assignee: SK hynix Inc.Inventor: Dae Sung Kim
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Patent number: 12189516Abstract: A controller for a vehicle (10) and a method of testing a program element of a vehicle function using the controller includes the controller having a computing device which runs a control program for controlling a vehicle function and a test environment with a control test program for testing at least one program element of a vehicle function. The test environment may be defined within a runtime environment delimited by the control program. The control test program may have a program interface which can integrate and run the at least one program element in a runtime of the control test program so that the control test program can test the at least one program element of the vehicle function.Type: GrantFiled: January 19, 2021Date of Patent: January 7, 2025Assignee: AUDI AGInventors: Klaus Hofmockel, Stefan Sicklinger
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Patent number: 12181952Abstract: Fence randomization with inter-chip fencing constraints, including: receiving a fencing setup comprising one or more parameters for fencing a plurality of chips in a plurality of drawers; and selecting, based on the one or more parameters and one or more dependencies for implementing the one or more parameters, a subset of the plurality of chips for fencing, wherein the subset of the plurality of chips are selected at least partially randomly; generating a testing configuration indicating the selected subset of the plurality of chips.Type: GrantFiled: October 31, 2022Date of Patent: December 31, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Daniel Alexander Thorne, Kevin Calabrese
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Patent number: 12182612Abstract: The excitation of processing paths in a microelectronic circuit is organized by providing one or more pieces of input information to a decision-making software, and executing the decision-making software to decide, whether one or more of said processing paths of the microelectronic circuit are to be excited with test signals. Deciding that said processing paths are to be excited with said test signals results in proceeding to excite said one or more of said processing paths with said test signals and monitoring whether timing events occur on such one or more excited processing paths. A timing event is a change in a digital value at an input of a respective register circuit on an excited processing path, which change took place later than an allowable time limit defined by a triggering signal to said respective register circuit.Type: GrantFiled: October 18, 2019Date of Patent: December 31, 2024Assignee: MINIMA PROCESSOR OYInventors: Lauri Koskinen, Navneet Gupta, Risto Anttila, Samuli Tuoriniemi