Patents Examined by Joseph R Kudirka
  • Patent number: 11366710
    Abstract: A system and method for shortening the system management mode when a fault occurs in hardware component in a computer system is disclosed. The computer system has hardware components that may have faults. Notification of an error in one of the hardware components is received through RAS silicon on a processing unit. The error is detected from the hardware component by a system management interrupt handler executed by a bootstrap processor core. The error data is logged into a system error log via a system control interrupt handler executed by the processing unit. The system management mode is avoided during the logging of the error data. This prevents other processor cores being suspended from the system management mode.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: June 21, 2022
    Assignee: QUANTA COMPUTER INC.
    Inventors: Ming-Hung Hung, Hsing-Chi Chen, Yan-Ting Jiang
  • Patent number: 11360843
    Abstract: Systems and methods described herein are directed to minimizing the resource requirements for edge and network while keeping the accuracy of machine learning classifier by utilizing simulated test data. Once sufficient measured test data is collected by the server, the server instructs the edge computer to reduce the transmission of data received from the corresponding sensors.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: June 14, 2022
    Assignee: HITACHI, LTD.
    Inventors: Daisuke Maeda, Sudhanshu Gaur
  • Patent number: 11347610
    Abstract: A system and a method for assisting with troubleshooting a complex system is disclosed in which the troubleshooting procedure can be modeled by a Markov decision process. Combining the fault tree technique with a Markov decision process, in order to determine in an optimal manner the sequence of troubleshooting actions will quickly address the consequences of a failure and ensure maintainability of the complex system.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: May 31, 2022
    Assignees: AIRBUS DEFENCE AND SPACE SAS, AIRBUS
    Inventors: Jean-Luc Marty, David Canu, Alexandre Arnold
  • Patent number: 11347576
    Abstract: Some embodiments of the invention provide methods for performing root cause analysis for non-deterministic anomalies in a datacenter. For instance, the method of some embodiments identifies a root cause for degradation in performance of one or more components in a network of the datacenter. This method collects and generates resource consumption data regarding resources consumed by a set of components in this network. The method performs a first analysis on the collected and/or generated data to identify an instance in time when one or more components, while still operational, are possibly suffering from performance degradation. The method then performs a second analysis on the collected and/or generated data associated with the identified time instance to identify a root cause of a performance degradation of at least one component in the network.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: May 31, 2022
    Assignee: VMWARE, INC.
    Inventors: Girish Nadger, Somenath Pal, Somaresh Sahu
  • Patent number: 11334412
    Abstract: A method comprising the steps of responding to expiration of a timer, transmitting a signal from the timer to circuitry; responsive to receiving the signal, retrieving by the circuitry (i) first values stored in an analog array, and (ii) second values stored in a digital non-volatile memory; performing, by the circuitry, operations comprising a comparison of the first values and the second values; analyzing, by the circuitry, results of the comparison to determine whether an error is greater than or equal to a predefined threshold; responsive to determining the error is greater than or equal to the predefined threshold, initiating, by the circuitry, operations to reprogram the analog array with the second value is described.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: May 17, 2022
    Assignee: Syntiant
    Inventors: Kurt F. Busch, Jeremiah H. Holleman, III, Pieter Vorenkamp, Stephen W. Bailey
  • Patent number: 11334420
    Abstract: A client computing system receives a chat message with an action identifier. The chat message is parsed to identify executable recovery code on the client computing system. The executable recovery code is represented in a chat message interface on the client computing system, along with an authorization actuator. Actuation of the authorization actuator is detected and the recovery code is executed on the client computing system.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: May 17, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Zyanya Valdes Esquivel, Shakeel Solkar, Scott A. Moody, Diana Slaba, Jonathan H. Mollerup, Luis Delgado, Yuedong Yin
  • Patent number: 11334419
    Abstract: A disclosed fault analysis solution and method includes provisioning an NVMe boot directory of an information handling system with a notification module configured to perform certain operations in a pre-OS context, The operations may include detecting a pre-OS error event, determining a faulty component associated with the error event, identifying one or more executable scripts and tools associated with the faulty component, invoking a support app to download the one or more executable scripts and tools, and executing the one or more executable scripts and tools to generate a fault analysis report. The executable scripts may perform script operations including retrieving event data including one or more logs and system parameters associated with either the error event or the faulty component and storing the event data in an error log file. The executable tools may perform remedial measures associated with the error event or the faulty component.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: May 17, 2022
    Assignee: Dell Products L.P.
    Inventors: Shekar Babu Suryanarayana, Srikanth Krishnamurthy, Sumanth Vidyadhara
  • Patent number: 11334379
    Abstract: A control device according to an embodiment includes hardware. The hardware includes a memory and a processor. The memory stores a host operating system (OS), a virtual machine, a guest OS, a guest process, and a controller process. The virtual machine is implemented on the host OS. The guest OS operates on the virtual machine. The guest process unit is operated by the guest OS, and executes control processing for an external appliance to be controlled using the hardware that is allocated to the guest OS in accordance with hardware allocation data indicating hardware to be allocated to each of the host OS and the guest OS. The controller process unit is operated by the host OS, and executes control processing for the appliance to be controlled using the hardware that is allocated to the host OS in accordance with the hardware allocation data.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: May 17, 2022
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Infrastructure Systems & Solutions Corporation
    Inventor: Genki Tateno
  • Patent number: 11334409
    Abstract: A fault collection and reaction system on a system-on-chip (SoC) includes a plurality of reaction cores assigned to a plurality of applications being executed by a plurality of processor cores on the SoC, at least one look-up table (LUT), and a controller. The at least one LUT stores therein a first mapping between the plurality of reaction cores and corresponding plurality of domain identifiers, and a second mapping between a plurality of faults and a set of reaction combinations. The controller receives a fault indication and a first domain identifier in response to occurrence of a first fault and selects from the plurality of reaction cores, a first reaction core mapped to the first domain identifier, and from the set of reaction combinations, a first reaction combination mapped to the first fault. The first reaction core responds to the fault indication with a reaction based on the selected reaction combination.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: May 17, 2022
    Assignee: NXP USA, INC.
    Inventors: Hemant Nautiyal, Jehoda Refaeli, Ankush Sethi, Shreya Singh
  • Patent number: 11327863
    Abstract: An electronic control device includes: a diagnostic circuit unit configured to be reconfigurable so as to be used to diagnose each of a plurality of processing circuits that processes an input signal; an input data storage unit configured to temporarily store the input signal; an output data storage unit configured to temporarily store an output signal of the plurality of processing circuits; a reconfiguration control unit configured to sequentially write, to the diagnostic circuit unit as circuit configuration information, circuit information the same as that of the plurality of processing circuits; a diagnostic control unit configured to cause the diagnostic circuit unit to perform calculation using the input signal stored in the input data storage unit when the circuit configuration information is written to the diagnostic circuit unit; and a comparator configured to diagnose each of the plurality of processing circuits by comparing output of the diagnostic circuit unit and the output signal stored in the
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: May 10, 2022
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Kenichi Shimbo, Tadanobu Toba, Hideyuki Sakamoto
  • Patent number: 11327853
    Abstract: A multicore system according to one or more embodiments is disclosed, which may include processors that execute processing different from each other, a selector that selects one of the processors, a checker processor, a comparator that compares an external state of the processor selected by the selector with an external state of the checker processor, or compares an internal state of the processor selected by the selector with an internal state of the checker processor, and a controller that determines that the selected processor or the checker processor is abnormal in response to the external states or the internal states not matching each other based on comparison results obtained by the comparator.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: May 10, 2022
    Assignee: SANKEN ELECTRIC, LTD.
    Inventor: Takanaga Yamazaki
  • Patent number: 11314582
    Abstract: An information handling system may include a processor and a basic input/output system configured to, responsive to an occurrence of an exception error, triage among various hardware components of the information handling system to determine existence of any signatures of potential hardware failures, write a database structure to a non-volatile memory including the signatures of potential hardware failures, upon boot of the basic input/output system, enable one or more control methods for hardware failure mitigations associated with the signatures of potential hardware failures, and perform the mitigations during execution of an operating system of the information handling system.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: April 26, 2022
    Assignee: Dell Products L.P.
    Inventors: Craig L. Chaiken, Siva Subramaniam Rajan
  • Patent number: 11314570
    Abstract: An electronic device is disclosed. The present electronic device comprises: a communication unit; a memory for storing at least one command; and a processor for, by executing the at least one command, controlling the communication unit to transmit a control command for controlling an IoT device, and controlling the communication unit to acquire log information relating to a received response in relation to the control command and the transmission of the control command and transmit the acquired log information to an external device.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: April 26, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hahyoung Kim, Hawyong An
  • Patent number: 11308221
    Abstract: Provided are systems, methods, and computer-readable medium for a simulation platform that can generate simulated activity data for testing a security monitoring and control system. In various examples, the simulation platform can parse the activity data from a cloud service to generate a template, where each entry in the template describes an action and the fields associated with the action. The simulation platform can further generate a configuration that describes a test scenario. The simulation platform can use the configuration and the template to generate the particular action, including randomizing some or all of the fields of the action. When input into the security monitoring and control system, the system can operate on the simulated activity data in the same way as when the system ingests live activity data.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: April 19, 2022
    Assignee: Oracle International Corporation
    Inventors: Kamalendu Biswas, Gaurav Bhatia, Shachi Prasad, Kiran Shriniwas Doddi
  • Patent number: 11294758
    Abstract: Automated computational methods and systems to classify and troubleshoot problems in information technology (“IT”) systems or services provided by a distributed computing system are described. Each IT system of the distribution computing system or IT service provided by the distributed computing system has an associated key performance indicator (“KPI”) used to monitor performance of the IT system or service. When real-time KPI data violates a KPI threshold, a real-time event-type distribution is computed from event messages generated by event sources associated with the IT system or service following the threshold violation. The real-time event-type distribution is compared with historical event-type distributions recorded for the KPI data in order to identify the problem and execute remedial action to resolve the problem.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: April 5, 2022
    Assignee: VMware, Inc.
    Inventors: Ashot Nshan Harutyunyan, Arnak Poghosyan, Naira Movses Grigoryan
  • Patent number: 11288152
    Abstract: Provided is a computer-implemented method, the method including storing a meta-model in a computer-readable storage medium, wherein the meta-model includes at least one risk element, at least one test element and at least one objective element, and associations between the elements, wherein each risk element is associated with one or more objective elements, and/or each risk element is associated with one or more test elements, wherein at least one element of the elements and/or at least one association has at least one associated risk-related parameter. Also provided is a corresponding computer program product and system.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: March 29, 2022
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Kai Höfig, Peter Zimmerer
  • Patent number: 11281538
    Abstract: A method and system of checkpointing in a computing system having a primary node and a secondary node is disclosed. In one embodiment the method includes the steps of determining by the primary node to initiate a checkpoint process; sending a notification to the secondary node, by the primary node, of an impending checkpoint process; blocking, by the primary node, I/O requests from the Operating System (OS) that arrive at the primary node after the determination to initiate the checkpoint process; completing, by the primary node, active I/O requests for data received from the OS prior to the determination to initiate the checkpoint process, by accessing the primary node data storage; and upon receiving, by the primary node, a notice of checkpoint readiness from the secondary node, initiating a checkpoint process to move state and data from the primary node to the secondary node.
    Type: Grant
    Filed: June 13, 2020
    Date of Patent: March 22, 2022
    Assignee: STRATUS TECHNOLOGIES IRELAND LTD.
    Inventors: Nathaniel Horwitch Dailey, Stephen J. Wark, Angel L. Pagan
  • Patent number: 11275764
    Abstract: In one aspect, automatic recovery of a synchronous replication session in response to an error is provided for a storage system that includes a source and target sites. During an active sync replication session in which a state machine indicates the system is operating in sync, an aspect includes monitoring input/output (IO) operations. Upon determining an occurrence of the error in which data has been persisted at the source site but not at the target site, an aspect includes discontinuing replication to the target site and transitioning the state machine from a sync state to a tripped state. Upon determining, during the tripped state, resources exist to conduct sync replication remote data transfer operations, transition the state machine to an async_to_sync state. The async_to_sync state causes the storage system to initiate a recovery operation to return the source and target sites to the sync state.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: March 15, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Xiangping Chen, Svetlana Kronrod
  • Patent number: 11275643
    Abstract: The disclosed embodiments generate a plurality of anomaly detector configurations and compare results generated by these anomaly detectors to a reference result set. The reference result set is generated by a trained model. A correlation between each result generated by the anomaly detectors and the result set is compared to select an anomaly detector configuration that provides results most similar to those of the trained model. In some embodiments, data defining the selected configuration is then communicated to a product installation. The product installation instantiates the defined anomaly detector and analyzes local events using the instantiated detector. In some other embodiments, the defined anomaly detector is instantiated by the same system that selects the anomaly detector, and thus in these embodiments, the anomaly detector configuration is not transmitted from one system to another.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: March 15, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Robert Lee McCann, Christian Seifert
  • Patent number: 11265402
    Abstract: Various systems and methods may be used to implement a software defined industrial system. For example, an orchestrated system of distributed nodes may run an application, including modules implemented on the distributed nodes. The orchestrated system may include an orchestration server, a first node executing a first module, and a second node executing a second module. In response to the second node failing, the second module may be redeployed to a replacement node (e.g., the first node or a different node). The replacement mode may be determined by the first node or another node, for example based on connections to or from the second node.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 1, 2022
    Assignee: Intel Corporation
    Inventors: Rita H. Wouhaybi, Robert Chavez, Mark Yarvis, John Vicente, Kirk Smith