Abstract: A method and apparatus for providing dynamic multi-pathing for an asymmetrical logical unit access (ALUA) based storage system. The method comprises identifying a first processor within a storage system as providing an optimized path to a disk array, identifying a second processor within a storage system as providing an unoptimized path to the disk array and, in response to failure of the optimized path, immediately switching from the optimized path to the unoptimized path.

Abstract: For some data processing systems, it is important to be able to handle overlapping debug events generated by a shared set of debug resources which are trying to cause both exception processing and debug mode entry. However, exception processing and debug mode entry generally have conflicting requirements. In one embodiment, exception priority processing is initially given to the software debug event. Normal state saving is performed and the first instruction of the debug exception handler is fetched, but not executed. Priority is then switched from the software debug event to the hardware debug event and a debug halted state is entered. Once processing of the hardware debug event has been completed, priority is returned to the software debug event and the debug exception handler is executed.

Abstract: In a storage device incorporating a plurality of kinds of disk drives with different interfaces, the controller performs sparing on a disk drive, whose errors that occur during accesses exceed a predetermined number, by swapping it with a spare disk drive that is prepared beforehand.

Abstract: A program product is embedded in a media accessible by a computer operative to request a plurality of program tasks for wakeup so as to execute the plurality of program tasks in a predetermined schedule. The program product causes at least one of the computer and another computer to execute the instructions of measuring a delay period between a request of at least one of a plurality of program tasks and a wakeup thereof. The instructions include comparing the measured delay period with a predetermined first timeout value, thus determining whether at least one of the plurality of tasks is abnormally executed by the computer based on the comparison result.

Abstract: The present invention provides methods and systems for a customizable collector application, which automates multiple diagnostic techniques to obtain sets of diagnostic information. The collector application is easily customizable for use by different products, and may reduce the diagnostic information gathering to a single session. This includes gathering all of the required sets of information about a product problem, the hardware environment, the maintenance levels of the operating system environment, and the involved middleware, both local and distributed. In addition, the collector application has a reusable framework designed to have minor external customization for each product that requires its' service. The output of the collector application may be provided in a format, such as XML, that is viewable by another application, such as browser.

Abstract: A method for operating a computer data storage system is described. A recoverable error in a data storage device in recognized in response to receiving a command for a write operation. It is determined whether the data storage system is in a degraded state. The write operation encountering the recoverable error is reassigned to a space on a spare data storage device if the data storage system is not in a degraded state. The write operation is stored to reassign to a spare data storage device at a future time if the data storage system is in a degraded state.

Abstract: Memory downsizing in a computer memory subsystem, the subsystem including one or more channels of computer memory with each channel including several Dual In-line Memory Modules (‘DIMMs’) and each DIMM capable of on-die termination (‘ODT’). Memory downsizing according to embodiments of the present invention includes identifying, during a memory initialization test in a Power On Self Test (‘POST’) by a firmware module, a defective DIMM of a particular channel in the computer memory subsystem and disabling, by the firmware module, the defective DIMM, including enabling ODT for the defective DIMM without disabling any non-defective DIMMs.

Abstract: A network appliance for monitoring, diagnosing and documenting problems among a plurality of devices and processes (objects) coupled to a computer network utilizes periodic polling and collection of object-generated trap data to monitor the status of objects on the computer network. The status of a multitude of objects is maintained in memory utilizing virtual state machines which contain a small amount of persistent data but which are modeled after one of a plurality of finite state machines. The memory further maintains dependency data related to each object which identifies parent/child relationships with other objects at the same or different layers of the OSI network protocol model. A decision engine verifies through on-demand polling that a device is down. A root cause analysis module utilizes status and dependency data to locate the highest object in the parent/child relationship tree that is affected to determine the root cause of a problem.

Abstract: The input/output (I/O) performance of a hard disk drive in a mass storage computer system is evaluated to maintain efficiency by addressing I/O commands to sectors of the disk drive, evaluating the execution of the I/O commands to the sectors to obtain performance information for the sectors to which the I/O commands are addressed, comparing the performance information to a predetermined I/O performance criterion, and identifying any impaired sectors in which the performance information indicates less than the predetermined I/O performance criterion. Thereafter, further I/O commands to the impaired sectors are avoided.

Abstract: The invention relates to a computer-implemented diagnostic procedure for a field bus system in which bus users exchange data via a field bus in accordance with a predetermined communication protocol, the data being exchanged in the form of data packets, comprising the following procedural steps: (a) recording states of the bus users; (b) detecting a data packet which is transmitted via the field bus between the bus users; (c) analyzing the data packet and deriving an updated state of the bus users in dependence on the preceding state of the bus users and the content of the data packet; (d) recording the updated states of the bus users; (e) repeating steps (b) to (d) in order to detect the current states of the bus users in an in-line manner.

Abstract: Systems and methods to modify a set of connection records are described. A determination is made that an application failed to access a first database via a connection record, where the connection record includes data to access the first database. A determination is made that a second database is accessible, where the second database is a failover database to the first database. A set of connection records associated with the first database is modified to enable access to the second database.

Abstract: A system (such as a process control system or communication system) includes one or more sources of configuration data (such as one or more BootP or DHCP servers). A testing mechanism transmits one or more requests for configuration data over a network. One or more sources of configuration data may respond to the requests, such as by providing configuration data (like IP addresses or NTP parameters) to the testing mechanism. The testing mechanism uses the response(s) to identify problems with the sources of configuration data. For example, if responses are received from multiple sources of configuration data, the testing mechanism could generate a notification indicating that a problem exists when the responses contain inconsistent configuration data. Also, if no responses are received, the testing mechanism could generate a notification indicating that a problem exists since no configuration data has been received. Any other or additional problems could also be detected.

Abstract: Methods and apparatuses for enhanced protection of data stored in a FLASH memory system involve a controller capable of protecting data using page stripes and auxiliary protection stripes. The controller stores the data in a manner such that the pages making up each page stripe include a plurality of data pages and at least one data protection page and the pages making up each auxiliary protection stripe include a plurality of data pages and an auxiliary protection page. At least a plurality of data pages are within one page stripe and one auxiliary protection stripe such that each data page is protected both by a data protection page in the page stripe and an auxiliary protection page in the auxiliary protection stripe.

Abstract: A thread has a corruption detection mechanism that compares a beginning state of a function with an ending state to determine any inconsistencies. Based on the type of inconsistency, a remedial action may be taken, such as ignoring the inconsistency, cleaning up the inconsistency, and terminating the thread with an exception. The analysis may also include analyzing various states after function execution to find problems such as incomplete transactions. Such a thread may be useful in an operating system as well as a multi-threaded application environment.

Abstract: In order to detect problematic drives in random arrays of independent disks, the system measures the latency of executing command sets which are broadcast to all disks in the data storage system and the results are compared to identify which disks take substantially longer to complete the requests. Disks that take longer to complete requests are likely to be problematic and are candidates for further examination and replacement. The disks in each tier group are compared to determine if any disk in that group exhibits problems. Also, counters for each tier group are compared to determine if the problem is with the disk or with the channel of the tier group. The latency of each disk in the tier group is saved in a table to provide a histogram of the latency of the disks in the tier group. Histograms of the disks in a single tier group are compared to determine if a specific disk is problematic.

Abstract: A storage control apparatus monitors whether or not one or more storage management apparatuses are properly operating. A recovery target extraction unit extracts a recovery target storage area when the existence of a malfunctioning storage management apparatus is detected, the recovery target storage area being a storage area that has been duplexed with a storage area of the malfunctioning storage management apparatus. A duplexing control unit performs control so that, if the recovery target storage area has no data stored therein, the recovery target storage area is duplexed with a storage area that has no data stored therein and that is unused. If the recovery target storage area has data stored therein, the recovery target storage area is duplexed with a non-duplexed storage area and the data stored in the recovery target storage area is copied into the non-duplexed storage area.

Abstract: Embodiments of the present invention are directed to validating a rules-based diagnostic system for a network. Emulated data for use by the rules-based diagnostic system can be generated that includes a trouble ticket to emulate a problem associated at least one of Layer 1 and Layer 2 network services and includes network information associated with the problem. Responses from the rules-based diagnostic system can be received in response to the emulated data being processed by the rules-based diagnostic system. A log generated by the rules-based diagnostic system can be analyzed to determine rules implemented by the rules-based diagnostic system in response to the emulated data, thereby validating operation of the rules-based diagnostic system.

Abstract: A semiconductor integrated circuit device uses two keeper cells per configuration and/or enable bit as dual redundant storage with error detection thereof. One of the two keeper cells stores a logic level and the other keeper cell stores the inverse of that logic level before the integrated circuit device goes into a low power mode. An exclusive OR (XOR) is performed on the outputs of the two keeper cells (a keeper cell pair) such that if the two keeper cells of the keeper cell pair do not have opposite logic levels stored therein, then the respective XOR outputs an error signal for that keeper cell pair and the error signal is used to force the integrated circuit device out of the low power mode, depending on software control, with or without disturbing input-output (I/O) configuration control and data states present at the time the low power mode was entered.

Abstract: Systems and methods for automatic determination of out of memory handling situations are provided. A system and method can include receiving data that includes one or more memory allocations or one or more pool heaps and running a test on the data to capture one or more tracebacks. If the one or more tracebacks are unique, then the one or more unique tracebacks are added to a list. The test is run a second time on the first traceback on the list to determine a result that indicates correct execution or incorrect execution with respect to memory handling. The result is stored in a computer-readable storage medium.

Abstract: A new method for the detection and correction of environmentally induced functional interrupts (or “hangs”) induced in computers or microprocessors caused by external sources of single event upsets (SEU) which propagate into the internal control functions, or circuits, of the microprocessor. This method is named Hardened Core (or H-Core) and is based upon the addition of an environmentally hardened circuit added into the computer system and connected to the microprocessor to provide monitoring and interrupt or reset to the microprocessor when a functional interrupt occurs. The Hardened Core method can be combined with another method for the detection and correction of single bit errors or faults induced in a computer or microprocessor caused by external sources SEUs.