Patents Examined by Joshua Benitez
  • Patent number: 7391221
    Abstract: One exemplary device has a plurality of leads with termination impedances, and a standard impedance. Among the termination impedances are master impedances arranged to be calibrated by comparison with the standard impedance and slave impedances arranged to be calibrated in accordance with an associated master impedance.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: June 24, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jayen J. Desai, James M. Dewey, David Purvis
  • Patent number: 7378835
    Abstract: An N-wire interleaved differential multiplexer. The N-wire interleaved differential multiplexer may be formed by interleaving the channels and corresponding switches of N one-wire multiplexers. Each of the switches of the interleaved differential multiplexer may be controlled independent from the other switches to provide a signal path between a DUT stack and a measurement device. To test a first DUT, two switches of the interleaved multiplexer are closed to connect the terminals of the first DUT to the measurement device. To switch from testing the first DUT to testing a subsequent DUT, one of the previously activated switches is opened, one is kept closed, and a different switch is closed. The testing process may “walk” up or down the switch channels of the interleaved multiplexer one switch at a time to test each of the DUTs of the DUT stack.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: May 27, 2008
    Assignee: National Instruments Corporation
    Inventors: James A. Reimund, Steven D. Geymer, Jason P. White
  • Patent number: 7375507
    Abstract: An assembly group for current measurement comprises a conductor plate with three cuts and a measuring element placed on the conductor plate that has a difference sensor formed from two magnetic field sensors. By means of the three cuts a first and a second conductor section are formed in the conductor plate, wherein the current direction in the second conductor section runs opposite to the current direction in the first conductor section. The first magnetic field sensor is located above the first conductor section and the second magnetic field sensor is located above the second conductor section. The magnetic field sensors are sensitive to a magnetic field that runs parallel to the surface of the conductor plate and orthogonal to the current direction in the two conductor sections.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: May 20, 2008
    Assignee: Melexis Technologies SA
    Inventors: Robert Racz, Samuel Huber
  • Patent number: 7365552
    Abstract: A fault detection apparatus for surface mount packages is provided. The apparatus can include a retainer for releasably securing a circuit board such as a printed circuit board having an electrical component mounted thereon via a ball grid array surface mount package. When mounted within the apparatus, a test signal is applied to the electrical component. The apparatus includes a mechanical actuator, such as a solenoid, for applying a reciprocating force to the circuit board. The reciprocating force can disturb a defect in the ball grid array manifesting as a mechanically unreliable connection at one of the balls where an electrically intermittent connection is occurring. By disturbing the mechanically unreliable connection, the electrically intermittent connection can be caused to fail altogether and thereby reveal the defect as a test signal is carried through the printed circuit board.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: April 29, 2008
    Assignee: Research In Motion Limited
    Inventor: John Sheeran
  • Patent number: 7348786
    Abstract: Probe modules, methods of use of probe modules, and methods of preparing probe modules, are disclosed. A representative embodiment of a probe module, among others, includes a redistribution substrate and a probe substrate interfaced with the redistribution substrate. The probe substrate is operative to test at least one signal of at least one optoelectronic device under test. The probe substrate is operative to interface with electrical and optical components.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: March 25, 2008
    Assignee: Georgia Tech Research Corporation
    Inventors: Hiren D. Thacker, Oluwafemi O. Ogunsola, James D. Meindl
  • Patent number: 7345467
    Abstract: There is provided a voltage generating apparatus that outputs a power source voltage from a voltage outputting terminal.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: March 18, 2008
    Assignee: Advantest Corporation
    Inventors: Hiroki Andoh, Hironori Tanaka
  • Patent number: 7342407
    Abstract: A temperature compensation circuit for effectively compensating the difference of a switching timing due to temperature change of a switching element included in a logic circuit is provided. The temperature compensation circuit includes a temperature detecting section for detecting a value corresponding to the temperature of the switching element, and a correction section for correcting the voltage of a logic signal inputted from a previous circuit to the logic circuit in order to reduce the difference of the switching timing due to the temperature change of the switching element based on the value corresponding to the temperature.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: March 11, 2008
    Assignee: Advantest Corporation
    Inventors: Yuji Kuwana, Yoshiharu Umemura, Takashi Sekino
  • Patent number: 7339391
    Abstract: A defect detection method is disclosed, in which the method includes: providing a semiconductor sample, wherein the semiconductor sample comprises at least one defect; utilizing a failure analysis for detecting at least one suspected area on the backside of the semiconductor sample; utilizing a physical energy for forming a plurality of reference marks around the suspected area on the backside of the semiconductor sample; and utilizing the reference marks for determining the relative location of the defect on the front side of the semiconductor sample.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: March 4, 2008
    Assignee: United Microelectronics Corp.
    Inventor: Kun Lin
  • Patent number: 7339366
    Abstract: A power detection system implemented using a pair of directional couplers and a transmission line (or equivalent) disposed between the directional couplers, wherein the transmission line (or equivalent) provides a 90° phase shift between the directional couplers. Accurate power detection is provided by combining the powers detected at each of the directional couplers, whereby the combined power is independent of load phase. The total power in the forward case is given by Pc1=2*Pf*C, where Pf is the forward power and C is the coupling coefficient the directional couplers. The total power in the reflected case is given by Pc1=2*Pf*C*(?2+D2), where Pf is the forward power, C is the coupling coefficient of said directional couplers, ? is the reflection coefficient, and D is the directivity of the directional couplers.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: March 4, 2008
    Assignee: Analog Devices, Inc.
    Inventor: Ping Li
  • Patent number: 7332903
    Abstract: A device is provided for measuring a current flowing in an electrical conductor with a magnetic circuit for coupling to the electrical conductor. The magnetic circuit has an air gap, and a magnetic field sensitive component is disposed in the air gap. The magnetic field sensitive component measures the magnetic field generated by the electrical conductor. Two control cores are disposed in the air gap to control an effective size of the air gap. The control cores each have a control winding for magnetic saturation of the respective control core to control the effective length of the air gap. The magnetic field sensitive component is disposed between the control cores.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: February 19, 2008
    Assignee: Lisa Dräxlmaier GmbH
    Inventors: Christian Hausperger, Edgar Kindler
  • Patent number: 7327158
    Abstract: A method of detecting thin film transistor (TFT) defects in a TFT-liquid crystal display (LCD) panel, includes, in part, applying a stress bias to the TFTs disposed on the panel; and detecting a change in electrical characteristics of the TFTs. The change in the electrical characteristics of the TFTs may be detected using a voltage imaging optical system or an electron beam. The panel temperature may be varied while the bias stress is being applied. The change in the electrical characteristics is optionally detected across an array of the TFTs.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: February 5, 2008
    Assignee: Photon Dynamics, Inc.
    Inventor: Myungchul Jun
  • Patent number: 7327135
    Abstract: An exemplary testing apparatus (200) for testing electronic device (280) includes a workbench (210), a conveyance board (221) for supporting the electronic device to be tested and a testing device (270). The conveyance board is slidably positioned on the workbench. The testing apparatus further includes an automatic detection device (250), a high voltage connector (241) and an automatic controller (290). The automatic controller receives a signal sent by the automatic detection device and sends an instruction to control the operation of the high voltage connector to connect a plurality of signal channels. The testing apparatus is safe and can reduce the cost.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: February 5, 2008
    Assignees: Innocom Technology ( Shenzhen) Co., Ltd., Innolux Display Corp.
    Inventor: Jun-Hua Yang
  • Patent number: 7323891
    Abstract: A method of and testing jig for sequentially testing front and rear surfaces of a semiconductor chip is shown. The testing jig includes a support package having a first cavity over which the semiconductor chip mounts; an infrared filter affixed relative to the first cavity and attached to a rear surface of the semiconductor chip; and a test substrate having a second cavity exposing the infrared filter and upon which the support package mounts. Front and rear surfaces of the semiconductor chip can be conveniently and sequentially tested. Because the testing jig includes the infrared filter and the heat pad, heat can be easily transmitted to the defective chip.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: January 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Jong Kim, Ho-Jeong Choi, Chan-Soon Park
  • Patent number: 7319336
    Abstract: An apparatus including a positioner control device, a measuring device and a control routine. The positioner control device is communicatively coupled to a chamber of a charged particle beam device (CPBD) and is configured to individually manipulate each of a plurality of probes within the CPBD chamber to establish contact between ones of the plurality of probes and corresponding ones of a plurality of contact points of a sample positioned in the CPBD chamber. The measuring device is communicatively coupled to the CPBD and the positioner control device and is configured to perform one of a measurement and a detection of a characteristic associated with one of the plurality of contact points. The control routine is configured to at least partially automate control of at least one of the CPBD, the positioner control device and the measuring device.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: January 15, 2008
    Assignee: Zyvex Instruments, LLC
    Inventors: Christof Baur, Robert J. Folaron, Adam Hartman, Philip C. Foster, Jay C. Nelson, Richard E. Stallcup, II
  • Patent number: 7312606
    Abstract: A method for detecting an abnormal condition of a MOS transistor in a subthreshold region. The method includes measuring a variation in a drain current with respect to a variation of a gate voltage of the MOS transistor to obtain a characteristics curve, and calculating, with reference to the obtained characteristics curve, a variation of transconductance with respect to each of the gate voltages to obtain a transconductance variable curve. The transconductance variable curve is differentiated. A number of inflection points in a curve obtained by the differentiation is determined to indicate the abnormal condition of the MOS transistor.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: December 25, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Chang Soo Jang
  • Patent number: 7298136
    Abstract: An electrical test lead includes an insulated electrical cable having a proximal end and a distal end, an electrical connector disposed at the proximal end of the cable and connected to a test instrument, and an electrically conductive magnetic probe disposed at the distal end. The probe is adapted to magnetically attach to a test point in an electrical system and to provide an electrical connection from the test point through the probe, the cable and the connector to the test instrument. Together, the test lead and the test instrument may be used as an electrical test kit. The test lead may further include an additional electrical test lead component magnetically attached, and electrically connected, to the electrically conductive magnetic probe and extending therefrom. An additional electrically conductive magnetic probe or a non-magnetic electrical connector may be disposed at the distal end of the additional electrical test lead component.
    Type: Grant
    Filed: July 6, 2006
    Date of Patent: November 20, 2007
    Inventor: Kevin Mark Curtis
  • Patent number: 7271605
    Abstract: A burn-in apparatus for conducting a burn-in test by housing a burn-in board mounted with a large number of DUT in a burn-in chamber, moving a temperature adjustment board downward and bringing temperature adjustment arrays attached to the temperature adjustment board contact with corresponding DUT; comprising a push-pull device having a movable body moving back and forth in the horizontal direction of a board surface of the burn-in board and a cam mechanism composed of a tilted cam and cam follower for elevating/lowering an elevator board by converting a back-and-forth movement of the movable body to a vertical movement is provided; wherein the push-pull device for elevating/lowering the temperature adjustment board can be downsized, so that a more compact burn-in apparatus can be provided.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: September 18, 2007
    Assignee: Advantest Corporation
    Inventors: Takashi Naitou, Atsuyuki Doi
  • Patent number: 7268535
    Abstract: An exemplary hi-pot testing device (2) includes a testing table (20), a transfer table (21) movably supported on the testing table and configured to support a product (200) to be tested, and a hi-pot testing signal generator (27) under the testing table. The transfer table includes a top surface and a bottom surface, a first current input portion (23) at the bottom surface (202), a first power connector (234) embedded at the top surface, and electrically connecting to the first current input portion, and a first signal cable connector (25) arranged on the top surface. The first signal cable connector is grounded and configured to enable the product to be grounded. The hi-pot testing signal generator is configured to electrically connect with and electrically disconnect from the first current input portion of the transfer table.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: September 11, 2007
    Assignees: Innocom Technology (Shenzhen) Co., Ltd., Innolux Display Corp.
    Inventors: Yan-Kai Zhang, Jun-Hua Yang
  • Patent number: 7262627
    Abstract: There is provided a measuring apparatus that generates a first strobe signal and a second strobe signal in synchronization with an output signal, sequentially changes phases of the strobe signals whenever the electronic device outputs the output signal multiple times, acquires a signal level of the output signal at each phase of the strobe signals by the multiple times, counts the number of times by which the signal level of the output signal to the first strobe signal is a High level for each phase of the first strobe signal, counts the number of times by which the signal level of the output signal to the second strobe signal is a Low level for each phase of the second strobe signal, and computes a phase of a variation point of a waveform of the output signal, a jitter amount, and distribution of jitter based on the counted number of times. The measuring apparatus measures a variation point of a waveform of the output signal, a jitter amount, and distribution of jitter by one-time test.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: August 28, 2007
    Assignee: Advantest Corporation
    Inventors: Tomoyuki Yamane, Hirokatsu Niijima
  • Patent number: 7262617
    Abstract: A method for manufacturing an integrated circuit, a measurement apparatus of an integrated circuit, and a wafer that reduces damages inflicted on bonding pads while enabling a probe test to be accurately performed. A sensor cell is arranged on a wafer between chip formation regions. The sensor cell has a diaphragm. Sensor pads, connected to a doping region, are arranged on the surface of the diaphragm. Probe needles contact the sensor pads. This strains the doping region and produces a corresponding voltage measured by the probe needles connected to the sensor pads. Relative inclination angle and relative distance of a probe card, which includes the probe needles, and the wafer are determined based on the measured voltage. A conduction test is performed by having the probe needles contact the bonding pad of the wafer while maintaining the determined the relative position.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: August 28, 2007
    Assignee: Freescale Semiconductor Inc.
    Inventors: Kenji Komatsu, Akira Nakajo