Patents Examined by Josie Ballato
  • Patent number: 6124718
    Abstract: Charged-particle-beam (CPB) projection-exposure apparatus are disclosed for inspecting a reticle and/or a substrate without having to remove the reticle and/or substrate from a vacuum chamber in which projection-exposure occurs. The CPB projection-exposure apparatus comprises a microscope for inspecting the reticle or substrate inside the vacuum chamber. For inspection, the reticle or mask is moved from a projection-exposure position to an inspection position within a field of view of the microscope without having to open the vacuum chamber.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: September 26, 2000
    Assignee: Nikon Corporation
    Inventor: Shintaro Kawata
  • Patent number: 6124721
    Abstract: A method of engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof includes: a) providing an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate; b) engaging the grouping of apexes with the single test pad on the semiconductor substrate; and c) sending an electric signal between the grouping of apexes and test pad to evaluate operability of integrated circuitry on the semiconductor substrate. Constructions and methods are disclosed for forming testing apparatus comprising an engagement probe having an outer surface comprising a grouping of a plurality of electrically conductive projecting apexes positioned in proximity to one another to engage a single test pad on a semiconductor substrate.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: September 26, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Malcolm Grief, Gurtej S. Sandhu
  • Patent number: 6124717
    Abstract: An improved time domain reflectometer (TDR) includes a capacitor coupled in series between a transmission medium under test and the TDR receiver input. A switch, operating under microprocessor control, selectively couples and uncouples the capacitor to a voltage reference, such as ground. During the generation of interrogating pulses from the TDR and the acquisition of data from the transmission medium under test, the capacitor is uncoupled from the voltage reference and acts as a DC blocking capacitor. During periods of non-TDR activity, the capacitor is coupled to voltage reference and acts as a load for low frequency interference appearing on the transmission medium. The capacitor-switch operation blocks low frequency interference signals from the receiver input of the TDR.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: September 26, 2000
    Assignee: Tektronix, Inc.
    Inventors: Edgar T. Guenther, Jr., Ronald J. Larrick
  • Patent number: 6121781
    Abstract: A component support and mechanization machine, which is comprised of a set of units U.1 to U.n, each of which comprises a collection of arcs that form continuous arc-shaped trajectories along which may be moved a series of telescoping columns, equipped with workheads with double hinge joints and capacitative sensors. The arcs of each unit are mounted on rails and the different units U.1 to U.n are placed on main rails.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: September 19, 2000
    Inventor: Manuel Torres Martinez
  • Patent number: 6121777
    Abstract: A method detects at least one property, such as cable length, of a multiconductor cable linked to a module by way of a logic and evaluation circuit within the module. The cable has at least one supply conductor connected by the module to a first potential and at least one signal conductor connected by the module to a second potential via a pull resistor. The supply conductor and the signal conductor will or will not be interconnected at the ends of the cable depending on whether given properties of the cable are present or not. The logic and evaluation circuit module detects the potential applied to the signal conductors and thereby determines the presence or absence of the cable properties to be determined.
    Type: Grant
    Filed: August 16, 1995
    Date of Patent: September 19, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventor: Reinhold Hartwig
  • Patent number: 6121778
    Abstract: Electrical filter circuits are tested by connecting to the filter inputs without the need to connect to the filter outputs or to disconnect the outputs from a load. A signal generator of known source resistance applies a.c. signals successively over a range of frequencies to the filter inputs, and a voltmeter monitors the voltage across the filter inputs. Different types of filter have different characteristic shapes for the voltage/frequency curve, and processing is applied to the measured results in a compute to determine the location of inflections in the curve and other characteristics of the curve. Methods are disclosed for determining the values of the individual sub-components of the filter. Where the filter is an L-C filter, an interactive process is applied to successively improve the accuracy of the component value determinations. Using the techniques described enables the insertion loss of the filter also to be readily calculated by the computer.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: September 19, 2000
    Assignee: BCF Designs Limited
    Inventor: Anthony James Moore
  • Patent number: 6121782
    Abstract: A method and apparatus for measuring at least one parameter including mass flow rate or moisture content of material moved by a conveyor are disclosed herein. The method includes the steps of applying an electric field to the material using a non-intrusive sensor assembly, generating signals related to the dielectric value of the material, and processing the signals to determine the parameter. The apparatus includes a capaciflector sensor assembly located along a surface of the conveyor to generate an electric field applied to the material and a processing circuit to determine the parameter based upon the signals output from the sensor assembly. The sensor assembly includes a first conductor spaced between a stationary member of the conveyor and the material, and a second conductor spaced between the first conductor and the stationary member to act as a shield for reducing parasitic capacitance between the first conductor and a reference plane.
    Type: Grant
    Filed: April 9, 1997
    Date of Patent: September 19, 2000
    Assignee: Case Corporation
    Inventors: Brian T. Adams, George H. Hale, William L. Schubert
  • Patent number: 6121693
    Abstract: A power supply distribution comprises equipment having a shared power bus. Supply isolators isolate the supply from the shared power bus in the event of a power supply output short circuit. Load isolators isolate the supply from other loads that may short circuit, or consume excess output current. Memory and isolators are used to detect and store the occurrence of load or supply failures, and memory may be of revertive or non-revertive type.
    Type: Grant
    Filed: August 20, 1998
    Date of Patent: September 19, 2000
    Assignee: Cisco Technology, Inc.
    Inventor: Agnes G. Rock
  • Patent number: 6116094
    Abstract: A method for determining the axial load on an elongate member by measuring the differences in time of flight for transversely and longitudinally ultrasonic waves introduced in the elongate member under a zero load condition and at a current temperature and the time of flight for both of these types of waves introduced into the elongate member under the actual load condition, and calculating from these differences in the time of flight the actual load on the elongate member taking into account the influence of any occurring difference in temperature of the elongate member between the zero load condition time of flight measurement and the actual load condition time of flight measurement.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: September 12, 2000
    Assignee: Atlas Copco Controls AB
    Inventor: Tobias Axel Andersson
  • Patent number: 6118642
    Abstract: An electronic regulator for driving a power device connected to an output load having a first portion and a second protection portion, the first portion including a controlled switching element connected upstream of the power device and controlled by a timer adapted to be operated in a short circuit or overload situation of the device, such that the load current can flow in the power device in a pulsed state clocked by the timer.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: September 12, 2000
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Giovanni Benenati, Sergio Pioppo
  • Patent number: 6118268
    Abstract: A thermoelectric measurement converter is disclosed, which forms the output signal as the product of the instantaneous values of two input signals; wherein the measurement converter comprises at least one electronic resistor and at least one temperature sensor, both being disposed on a common base which is heat insulated with respect to the environment.
    Type: Grant
    Filed: January 22, 1998
    Date of Patent: September 12, 2000
    Inventor: Ladislav Grno
  • Patent number: 6118288
    Abstract: A printed circuit board (PCB) testing system for testing various types of PCBs includes a base plate corresponding to a target PCB; a plurality of probe assemblies, each having a probe pin electrically contactable with the target PCB and a removably securing member for removably attaching the probe pin on the base plate; a test point selection unit for determining a plurality of test points located on a target PCB to generate a test point selection signal representing the determined test points; and a probe arranging unit, in response to the test point selection signal, for moving and arranging said probes on positions of the base plate corresponding to said each determined test point to thereby bring each probe pin into contact with a corresponding test point.
    Type: Grant
    Filed: January 27, 1998
    Date of Patent: September 12, 2000
    Inventor: Jeung Gun Kang
  • Patent number: 6118190
    Abstract: A circuit for controlling a fail-safe operation of measurement and control apparatus for detecting the presence or absence of water by making a measurement of the impedance experienced in a gap between an insulated tip of the electrode and a surface held at a reference voltage or else connected to ground. The apparatus may be configured to provide an alarm when water is present and should not be, or vice versa. The circuit comprises comparators IC1 and IC2, a phase detector IC3 and a triple-redundant drive circuit 12 which drives a relay 14. The function of IC1 is to ensure that when operating with water as the normal condition, an electrode fault, such as could be caused by excessive contamination, will cause the system output to indicate an abnormal condition. The main function of IC2 is to discriminate between the water condition and the steam condition. The function of IC3 is to ensure that there is no output if there exists an abnormal condition or any fault condition.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: September 12, 2000
    Assignee: Solartron Group Limited
    Inventor: Paul N. Richards
  • Patent number: 6118279
    Abstract: A probability analysis technique is performed on magnetically obtained current data to detect short circuit defects in a plate structure (10) in which a group of first electrical conductors (32) are nominally electrically insulated from and cross a group of second electrical conductors (48). In particular, a magnetic current-sensing operation is performed on at least part of the conductors to produce current data indicative of how much, if any, current flows through each of at least part of the conductors. A short circuit defect probability analysis is then applied to the current data in order to select a location where one of the first conductors crosses one of the second conductors as being most probable of having a short circuit defect.
    Type: Grant
    Filed: July 30, 1997
    Date of Patent: September 12, 2000
    Assignee: Candescent Technologies Corporation
    Inventors: John E. Field, Stephanie J. Oberg
  • Patent number: 6118280
    Abstract: Disclosed are a method and an apparatus for detecting a defect in a dielectric film. The dielectric film is electrified in an electrolyte solution containing a metal in such a manner the dielectric film is charged negative, thereby the metal is deposited on the dielectric film at a position corresponding to the defect. The detecting method has a first deposition step for forming a first metal deposit on the dielectric film in an annular form surrounding the position corresponding to the defect; and a second deposition step for forming a second metal deposit located on the position corresponding to the defect, on the dielectric film. The detecting apparatus has a vessel for accommodating the electrolyte solution; a first electrode for electrifying the dielectric film and a second electrode; and an electric power source for controlably applying a voltage to electrifying between the first electrode and the second electrode in which a value and a direction of the applied voltage is variable.
    Type: Grant
    Filed: March 27, 1998
    Date of Patent: September 12, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Matsunaga, Isao Suzuki, Hiroshi Tomita, Shiro Takeno, Akira Okada
  • Patent number: 6118291
    Abstract: A test socket for testing a vertical surface mount packaged semiconductor device, the test socket including a test substrate, a support member, and clamps. The test substrate includes terminals which are electrically connectable to a testing device. The shape of the support member is complementary to the shape of the bottom surface of leads extending from the vertical surface mount packaged semiconductor device. The shape of the clamps is complementary to the top surface of the leads. The test substrate may also define lead alignment notches around one or more of the terminals. Upon placement of a vertical surface mount packaged semiconductor device on the test substrate, the leads are aligned with their corresponding terminals, then placed against the terminals and the support member. The clamps are then placed against the leads, biasing each of the leads against the support member and its corresponding terminal.
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: September 12, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Chris G. Martin, Manny Kin F. Ma
  • Patent number: 6118292
    Abstract: A method for correcting misalignment between test needles and test points during multiple electrical tests on printed circuit boards, in which setting up the machine to carry out the test on a circuit board or group of circuit boards, and hence correction of any misalignment, takes place without removing the circuit boards from the test area.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: September 12, 2000
    Assignee: Circuit Line SPA
    Inventors: Gianpaolo Antonello, Graziano Bagioni, Alberto Giani
  • Patent number: 6114869
    Abstract: A system for interfacing between a semiconductor wafer, an automatic wafer probe machine, and an automatic IC test system includes an insert ring adapted for attachment to a support of the wafer probe machines. A lock ring assembly includes a lock ring rotatably disposed in the insert ring. A cam element having a sloped camming surface is attached to the lock ring. A retaining element attached to the insert ring retains the lock ring in the insert ring. A lid hingeably attached to the insert ring supports a POGO tower assembly including an adapter ring for attachment to a POGO tower and a z-axis ring attached to the adapter ring, and a mounting assembly connecting the z-axis ring in spring-loaded relationship to the lid. A cam follower attached to the z-axis ring engages the sloped camming surface when the lid is lowered to position a bottom surface of the POGO tower slightly above the probe card.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: September 5, 2000
    Assignee: Cerprobe Corporation
    Inventors: Scott R. Williams, Martin A. Kurtz
  • Patent number: 6115230
    Abstract: A method and apparatus for detecting electromagnetic noise generated by an arc and controlling a power supply that powers the arcs. In an embodiment of the invention, the apparatus includes an arc detection circuit and a power supply control circuit. The arc detection circuit includes an antenna and a single shot timer. Electromagnetic noise generated by an arc is received by the antenna and activates the single shot timer, which causes the power supply control circuit to interrupt the power supply powering the arc for a predetermined length of time. A microprocessor can be used together with, or instead of, the single shot timer.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: September 5, 2000
    Assignee: Trion, Inc.
    Inventors: Ronald D. Voigts, Dennis G. Florit
  • Patent number: 6111417
    Abstract: A semiconductor test system comprises a tray including a plurality of pockets for accommodating a plurality of semiconductor component parts, a sucking mechanism for sucking the semiconductor component parts to firmly maintain the semiconductor component parts in the tray and a mechanism for moving the tray of semiconductor component parts relative to the sucking mechanism.
    Type: Grant
    Filed: February 13, 1997
    Date of Patent: August 29, 2000
    Assignee: Ricoh Company, Ltd.
    Inventor: Shinichi Kojima