Patents Examined by Jr. Moose
  • Patent number: 4456942
    Abstract: An elastomeric insulated fully shielded arrester including one or more surge arrester blocks mounted within an elastomeric housing having a layer of conductive material on the outer surface thereof, an electrically conductive contact at each end of the arrester block, the elastomeric housing providing a compressive force for maintaining electrical communication between the electrical contacts and the block or blocks and closely engaging the outer surface of the block or blocks to minimize corona discharge.
    Type: Grant
    Filed: August 2, 1978
    Date of Patent: June 26, 1984
    Assignee: RTE Corporation
    Inventor: Raymond J. Bronikowski
  • Patent number: 4184187
    Abstract: An unbalanced DC voltage detecting circuit which includes first and second switching transistors with one connected to the output terminal of a power amplifier through a low pass filter and the other connected to the output terminal through a DC level shifting device and the low pass filter with the outputs of the first and second transistors connected to a third switching transistor which controls current to a relay such that when said third transistor is turned off, the relay is deenergized to open a circuit to a load. The first and second transistors are controlled by unbalanced DC voltage which exceeds predetermined levels.A second embodiment includes temperature control to prevent overheating.
    Type: Grant
    Filed: July 19, 1978
    Date of Patent: January 15, 1980
    Assignee: Sony Corporation
    Inventor: Tadao Suzuki