Abstract: In a method for reducing and/or eliminating mismatch in one or more devices that require a balanced state (e.g., in cross-coupled transistors in each memory cell and/or sense amp in a memory array), the bias (i.e., the preferred state) of each of the devices is determined. Then, a burn-in process is initiated, during which an individually selected state is applied to each of the devices. This fatigues the devices away from their preferred states and towards a balanced state. The bias is periodically reassessed during the burn-in process to avoid over-correction. By using this method both memory cell and sense-amplifier mismatch can be reduced in memory arrays, resulting in smaller timing uncertainty and therefore faster memories.

Abstract: A driver circuit for a PRAM (phase-change random access memory) device includes a write driver that generates a set/reset current in response to a set/reset pulse. In addition, a temperature compensator controls a pulse width of the set/reset pulse in response to a peripheral temperature of the PRAM device. For example, the temperature compensator maintains the pulse width to be substantially constant irrespective of the peripheral temperature. In another example, the temperature compensator decreases the pulse width for higher peripheral temperature.

Abstract: A circuit for testing a ferroelectric capacitor in a FRAM includes: a test pulse signal generating part; a digital test pulse providing part, responsive to the test pulse signal; an n-bit counter, responsive to the digital test pulse signal as a clock signal; a measuring control signal providing part; a write pulse bar signal generating part; an input drive control part for receiving a reference voltage signal, a voltage signal at the first electrode of the ferroelectric capacitor, the measuring control signal, and the write pulse bar signal, and applying a driving voltage to the second electrode of the ferroelectric capacitor in response to the test pulse signal, and a measured result forwarding part for receiving the reference voltage signal and the voltage signal from the first electrode, and amplifying and forwarding a voltage variation between the electrodes of the ferroelectric capacitor.