Patents Examined by Junghwha Im
  • Patent number: 7067847
    Abstract: On a substrate made of e.g., sapphire single crystal is formed an Al underlayer having FWHM X-ray rocking curve value of 90 seconds or below. A buffer layer is formed on the AlN underlayer and has a composition of AlpGaqIn1?p?qN (0?p?1, 0?y?q). A GaN-based semiconductor layer group is formed on the buffer layer.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: June 27, 2006
    Assignee: NGK Isulators, Ltd.
    Inventors: Tomohiko Shibata, Keiichiro Asai, Yukinori Nakamura, Mitsuhiro Tanaka
  • Patent number: 7057286
    Abstract: A method for manufacturing a multi-level interconnection structure in a semiconductor device includes the steps of consecutively forming an anti-diffusion film and an interlevel dielectric film on a first level Cu layer, forming first through third hard mask films on the interlevel dielectric film, etching the interlevel dielectric film by using the first hard mask to form first through-holes, etching the first and second hard mask films and a top portion of the interlevel dielectric film by using the third hard mask film to form trenches, and etching the anti-diffusion film to form through-holes. The first hard mask film protects the interlevel dielectric film during removal of the second and third hard mask films.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: June 6, 2006
    Assignee: NEC Electronics Corporation
    Inventor: Tatsuya Usami
  • Patent number: 7026646
    Abstract: An isolation circuit includes a first pad adapted to receive a control signal and a second pad adapted to receive another signal. A third pad is coupled to a microelectronic die and a device is provided to transfer the other signal from the second pad to the third pad in response to the control signal.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: April 11, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Timothy B. Cowles, Aron T. Lunde