Patents Examined by Kamal Dewan
  • Patent number: 9378039
    Abstract: A device may receive agreement information associated with a customer of a cloud computing service. The agreement information may be based on input associated with the customer. The device may generate replication policy information based on the agreement information. The replication policy information may identify multiple replication sets, each including replication information. The device may identify data, associated with the customer, to be stored or processed by a cloud computing resource associated with the cloud computing service. The device may determine the replication set information, associated with each replication set, based on the replication policy information. The replication set information may identify at least one computing resource to store or process the data. The device may forward the data to the at least one computing resource based on the replication set information.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: June 28, 2016
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Jeffrey M. Bloom, Alex Iannicelli, Kishore Chitrapu, Paul M. Curtis
  • Patent number: 9367610
    Abstract: Systems and methods are disclosed that provide high-level, ontology-based analysis of low-level data stored within an unstructured key/value store. The systems and methods allow an analyst to make sense of massive amounts of data from diverse sources without having any knowledge of the underlying physical data storage. Additional features include feasibility queries to determine if requested data exists in the key/value store before performing an expensive query; automatic query optimization using secondary indexes; and a usage history service to identify performance bottlenecks and fine tune the storage schema.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: June 14, 2016
    Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Suresh K. Damodaran, Benjamin D. O'Gwynn, Tamara H. Yu
  • Patent number: 9355022
    Abstract: Systems and method for performing intelligent flash management are disclosed. A controller may determine if a write pattern exists between a set of writes associated with a first data chunk and a set of writes associated with a second data chunk based on whether a number of writes for first data chunk is equal to a number of writes for second data chunk; a degree to which a sequence of logical block address for the first data chunk matches the sequence of logical block addresses for the second data chunk; and a degree to which a size of each write for the first data chunk matches a size of each write for the second data chunk. The controller may then perform storage management operations based on whether or not a write pattern exists.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: May 31, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Narendhiran Chinnaanangur Ravimohan, Vithya Kannappan, Saranya Nedunchezhiyan
  • Patent number: 9330026
    Abstract: A security apparatus and method are provided for performing a security algorithm that prevents unauthorized access to contents of a physical address (PA) that have been loaded into a storage element of the computer system as a result of performing a prediction algorithm during a hardware table walk that uses a predictor to predict a PA based on a virtual address (VA). When the predictor is enabled, it might be possible for a person with knowledge of the system to configure the predictor to cause contents stored at a PA of a secure portion of the main memory to be loaded into a register in the TLB. In this way, a person who should not have access to contents stored in secure portions of the main memory could indirectly gain unauthorized access to those contents. The apparatus and method prevent such unauthorized access to the contents by masking the contents under certain conditions.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: May 3, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Thomas Zeng, Azzedine Touzni, Tzung Ren Tzeng, Phil J. Bostley
  • Patent number: 9298915
    Abstract: A data system may detect and halt unauthorized bulk data copy operations without interfering with or degrading authorized data copy operations. Characteristics of a request for access to a file system may be analyzed to determine whether a bulk data copy operation has been requested by a user. The bulk data copy operation may be allowed if the operation is below a particular permitted copy threshold or if the requesting user is authorized to execute a bulk data copy operation exhibiting certain characteristics.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: March 29, 2016
    Assignee: Oracle International Corporation
    Inventor: Denis Michael Goddard
  • Patent number: 9292664
    Abstract: A method can include injecting key information from memory of a memory device into non-volatile memory of a hardware device via a data port of the hardware device; receiving via the data port identification information from the hardware device that identifies the hardware device; and associating the key information and the identification information in the memory of the memory device. Various other apparatuses, systems, methods, etc., are also disclosed.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: March 22, 2016
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Christopher Robert Gordon, Keith W. Douglas, David J. Pfeiffer
  • Patent number: 9268644
    Abstract: A RAID module for a RAID controller that includes a thin RAID layer and a thin disk layer. The thin RAID layer sits between an operating system layer and a RAID stack, and intercepts and fields requests and I/Os made the between operating system and the RAID stack. The thin disk layer sits between the RAID stack and the disks that comprise the array, and intercepts and fields requests and I/Os made between the RAID stack and the array. The module may maintain a bitmap with an entry corresponding to each stripe of the array. When the module detects that a stripe has zero data, the entry in the bitmap for the stripe is set to 0. When the module detects that data has been written to a stripe, the entry in the bitmap for the stripe is set to 1.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: February 23, 2016
    Assignee: American Megatrends, Inc.
    Inventors: Srikumar Subramanian, Sankarji Gopalakrishnan, Narayanaswami Ganapathy, Paresh Chatterjee, Udita Chatterjee
  • Patent number: 9256544
    Abstract: For a memory access at a processor, only a subset (less than all) of the ways of a cache associated with a memory address is prepared for access. The subset of ways is selected based on stored information indicating, for each memory access, which corresponding way of the cache was accessed. The subset of ways is selected and preparation of the subset of ways is initiated prior to the final determination as to which individual cache way in the subset is to be accessed.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: February 9, 2016
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Matthew M. Crum, Teik-Chung Tan
  • Patent number: 9223709
    Abstract: A cache management unit manages allocation and configuration of a cache memory that is utilized by a multi-threaded processor. In some implementations, the cache management unit is configured to determine a number of active threads being executed by the multi-threaded processor, assign a separate cache unit to each active thread when the number of active threads is equal to a maximum number of active threads supported by the multi-threaded processor, and assign more than one cache unit to an active thread when the number of active threads is less than the maximum number of active threads.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: December 29, 2015
    Assignee: Marvell International Ltd.
    Inventors: R. Frank O'Bleness, Sujat Jamil, Tom Hameenanttila, Joseph Delgross
  • Patent number: 9213545
    Abstract: A memory controller containing one or more ports coupled to a buffer selection logic and a plurality of buffers. Each buffer is configured to store write data associated with a write request and each buffer is also coupled to the buffer selection logic. The buffer selection logic is configured to store write data associated with a write request from at least one of the ports in any of the buffers based on a priority of the buffers for each one of the ports.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: December 15, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hung Q. Le, Theodore F. Emerson, David F. Heinrich, Robert L. Noonan
  • Patent number: 9201810
    Abstract: Eviction priority technologies provide for the prioritized eviction of memory pages from a first memory, such as a DRAM, in a mobile computing device that have been copied from a second memory, such as flash memory. Eviction priority is based on eviction costs for the memory pages. The eviction cost for a page is based on page-in costs, page-out costs, the priority of a process associated with the page, page access probability and combinations thereof. Page-in costs include read costs, fixup costs and decompression costs, and page-out costs include write-back costs and compression costs. Page lists allow for the sorting of pages by page type (e.g., read only, read/write) and can be used to keep track of eviction costs. Pages are evicted from the first memory in order of increasing eviction cost.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: December 1, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Upender R. Sandadi, Javier N. Flores Assad
  • Patent number: 9201829
    Abstract: A tracking buffer apparatus is disclosed. A tracking buffer apparatus includes lookup logic configured to locate entries having a transaction identifier corresponding to a received request. The lookup logic is configured to determine which of the entries having the same transaction identifier has a highest priority and thus cause a corresponding entry from a data buffer to be provided. When information is written into the tracking buffer, write logic writes a corresponding transaction identifier to the first free entry. The write logic also writes priority information in the entry based on other entries having the same transaction identifier. The entry currently being written may be assigned a lower priority than all other entries having the same transaction identifier. The priority information for entries having a common transaction identifier with one currently being read are updated responsive to the read operation.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: December 1, 2015
    Assignee: Apple Inc.
    Inventor: Shu-Yi Yu
  • Patent number: 9135541
    Abstract: Provided is an image forming apparatus, including a nonvolatile memory writing unit configured to write into the nonvolatile memory, at every predetermined time period in which change data is written into the volatile memory within that predetermined time period, the change data written into the volatile memory, a temporary area writing unit configured to write new change data into a temporary area while a primary area writing unit is writing any change data into the primary area, and a primary area transfer unit configured to transfer any change data written into the temporary area by the temporary area writing unit to the primary area when the primary area writing unit completes writing the change data into the primary area.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: September 15, 2015
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Toyoaki Oku