Patents Examined by Kammand Cuneo
  • Patent number: 6738264
    Abstract: A foldaway electronic device includes a base unit having opposing lateral surfaces and an end portion, a cover unit having opposing lateral surfaces, each of which corresponds to one of the lateral surfaces of the base unit, and an end portion that is rotatably attached to the end portion of the base unit, whereby the cover unit may be rotated between a folded position relative to the base unit and an unfolded position relative to the base unit, a locking mechanism in the base unit and cover unit that locks the cover unit in the folded position, a lock release mechanism in the base unit that releases the locking mechanism when the cover unit is in the folded position, and impelling means in the base unit for impelling the cover unit from the folded position to an unfolded position after the lock release mechanism has been actuated, wherein either lateral surface of the base unit has a guard portion that extends over and prevents contact by a user's thumb and fingers with a portion of the corresponding la
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: May 18, 2004
    Assignee: Fujitsu Limited
    Inventor: Hisamitsu Takagi
  • Patent number: 6673691
    Abstract: A method of changing the resistance of a perovskite metal oxide thin film device with a resistance-change-producing pulse includes changing the resistance of the device by varying the duration of a resistance-change-producing pulse.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: January 6, 2004
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Wei-Wei Zhuang, Sheng Teng Hsu
  • Patent number: 6462285
    Abstract: A method and product for fabricating a printed circuit board assembly comprising a via, wherein the method inhibits the flow of molten solder into the via during a wave soldering step, thereby preventing heat transfer that might otherwise degrade a solder joint at a top pad that is thermally coupled to the via. The method comprises the steps of: (1) fastening a bottom component to the bottom surface of the circuit board by a screening and reflow of solder paste that also generates a solder plug in the via; (2) fastening top components to the top surface of the circuit board by a screening and reflow of solder paste, wherein the top components comprise ball grid arrays and other surface mount devices that are to be affixed to pads which are connected to vias; and (3) wave soldering the bottom surface to affix additional components onto the circuit board, such as pin-in-hole components placed on the top surface.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: October 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Wesley M. Enroth, George D. Oxx, Jr., Jenny B. Porter