Patents Examined by Keisha L Rose
  • Patent number: 7468557
    Abstract: An ultra thin film with very low electrical resistance is produced by forming a substrate of a substrate material which forms a metastable bond and depositing a conducting film on the substrate in a vacuum environment in which a base pressure is reduced to a value below 10?5 Torr. The film is a metal, metallic alloy, or multilayered film which includes at least one metallic layer. A 0.1 nm thick manganese film deposited in this way on a germanium substrate has a resistivity which at room temperature is lower than the resistivity of metal films of aluminum and copper with the same thickness prepared the same way.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: December 23, 2008
    Assignee: Syracuse University
    Inventor: Klaus Schroder
  • Patent number: 7423310
    Abstract: The memory cell is arranged in a ridge of semiconductor material forming a fin with sidewalls and a channel region between source and drain regions. Memory layer sequences provided for charge-trapping are applied to the sidewalls, and gate electrodes are arranged on both sides of the ridge. A plurality of ridges at a distance parallel to one another and have sidewalls facing a neighboring ridge form an array of charge-trapping memory cells. Wordlines are arranged between the ridges, sections of the wordlines forming the gate electrodes. This arrangement enables a double gate operation of the cells and thus allows for a storage of four bits of information in every single memory cell structure.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: September 9, 2008
    Assignee: Infineon Technologies AG
    Inventor: Martin Verhoeven