Patents Examined by Kelvin E. Booker
  • Patent number: 6763337
    Abstract: A method, and a system applying the method, for an exact and computationally efficient solution for defuzzification uses linear and non-linear weighted wedge approaches. Fuzzy numbers are used to represent parameters in a number of applications, including design dependent parameters (DDPs) for a project in particular. A defuzzification technique is used within the domain of fuzzy logic, fuzzy set theory, and multi-valued logic to overcome the problem of the lack of absolute ordering of a fuzzy number representation. The requirement profile for the DDP (the fuzzy representation of customer requirements) is compared to the anticipation profile for the DDP (the fuzzy representation of expected performance) in three dimensions. In two dimensions, the area of overlap between the DDP requirement profile and the DDP anticipation profile represents how well the customer requirements have been met.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: July 13, 2004
    Assignee: Lockheed Martin Corporation
    Inventors: Dinesh Verma, Caroline Smith
  • Patent number: 6532587
    Abstract: A data transfer unit is connected with an external nonvolatile memory storing a correction program and the like data, and it transfers the correction program, etc. of the external nonvolatile memory to an internal nonvolatile memory upon detecting it having been connected with the external nonvolatile memory. The external nonvolatile memory is disconnected from the data transfer unit after completion of the data transfer. When a CPU unit is reset thereafter, it transfers the correction program, etc. to a RAM unit, executes a program in a ROM unit, and also executes the correction program in the RAM unit upon reaching a correcting point stored in the RAM unit.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: March 11, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ryuichi Sakai, Koji Hirose
  • Patent number: 6247174
    Abstract: A software mechanism for enabling a programmer to embed selected machine instructions into program source code in a convenient fashion, and optionally restricting the re-ordering of such instructions by the compiler without making any significant modifications to the compiler processing. Using a table-driven approach, the mechanism parses the embedded machine instruction constructs and verifies syntax and semantic correctness. The mechanism then translates the constructs into low-level compiler internal representations that may be integrated into other compiler code with minimal compiler changes. When also supported by a robust underlying inter-module optimization framework, library routines containing embedded machine instructions according to the present invention can be inlined into applications. When those applications invoke such library routines, the present invention enables the routines to be optimized more effectively, thereby improving run-time application performance.
    Type: Grant
    Filed: January 2, 1998
    Date of Patent: June 12, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Vatsa Santhanam, David Gross, John Kwan
  • Patent number: 6226747
    Abstract: The method and system for limiting the number of installations of a computer software program located on a read only disk from the read only disk to a computer. The read only disk is linked to a removable read/write memory by data on the removable read/write memory corresponding to data on the read only disk. Prior to installation of the computer software program from the read only disk to the computer, software residing on the removable read/write memory determines whether the installation is authorized. Such determination is made by comparing identification information corresponding to computers on to which the computer software program has previously been installed to installation limitations dictated by a software license agreement.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: May 1, 2001
    Assignee: Microsoft Corporation
    Inventors: Jeffrey E. Larsson, Alan Richardson, Paul A. Steckler
  • Patent number: 6219828
    Abstract: A first copy of Open Firmware is loaded into system memory to supply a debug function and a second copy of the same firmware is then loaded to provide functional code which is to be debugged. The first copy of Open Firmware in system memory is designated as the resident debugging function. Kernel code, within the first copy, sets up an executing environment for the debugger, such as system exception handlers and debug console enablement. Normal Open Firmware configuration variables are retrieved from Non-Volatile Random Access Memory (“NVRAM”) by the first copy and transmitted to the loader. The second copy of Open Firmware is loaded into system memory to a location specified by the configuration variables. The second copy firmware image is designated as a normal Open Firmware operation in the system. The second copy initially takes over all system exception handlers except instruction breakpoint exception, program interrupt exception and trace exception.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: April 17, 2001
    Assignee: International Business Machines Corporation
    Inventor: Van Hoa Lee
  • Patent number: 6205578
    Abstract: The present invention provides an improved interpreter for stack-based languages. In one embodiment, a method includes executing a first interpreter for a first state, and executing a second interpreter for a second state. In particular, the first state indicates that no elements of a stack are stored in registers of a microprocessor, and a second state indicates that an element of the stack is stored in a register of the microprocessor.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: March 20, 2001
    Assignee: ATI International SRL
    Inventor: Daniel D. Grove
  • Patent number: 6195791
    Abstract: In an object oriented computer system, a framework mechanism defines an infrastructure for allowing a user to couple processes in the framework together in any suitable way to define a desired process flow. A user first defines a static object structure that corresponds to the specific process flow from one process to the next. The processes in the framework may be flexibly coupled in any suitable order, so a process does not have knowledge of its predecessor or successor processes. Thus, at run-time, a process determines the next step in the process flow from the static object structure. Once a process determines its subsequent process, a client may then create the next process and invoke methods on one or more objects corresponding to the newly-created process. Each process thus determines at run-time the next step in the process flow from the static object structure that the user statically defined to configure the process flow, which defines the desired processing environment.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: February 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Brent Allen Carlson, Jan Olof Engstrom, Timothy James Graser, Ulf Jesper Thomas Lindblom, Barbara Regine Proske
  • Patent number: 6192512
    Abstract: A computer application program subsystem (100) includes a program interpreter (120) and an application program interface (API 110) through which an external program requests an execution of a program of interest, such as a macro, in a specified simulated environment. The external program that requests the execution of the program of interest may further specify a simulated application state. The program of interest is written in a program language that the interpreter can interpret. The subsystem further includes an output path for returning to the external program at least one indication of what action or actions the program of interest would have taken if the program of interest had been run in a real environment that corresponds to the specified simulated environment.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: February 20, 2001
    Assignee: International Business Machines Corporation
    Inventor: David M Chess
  • Patent number: 6189140
    Abstract: A system for debugging a processor includes a debug interface including a handshake logic for communicating commands and data from a serial input/output port to a processor and to a trace control logic with a low delay. The handshake logic results in a low latency through the inclusion of a state machine that operates at the same speed as the processor. The state machine generates handshake signals to communicate among the serial input/output port, the processor, and the trace control logic.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: February 13, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Venkateswara Rao Madduri
  • Patent number: 6167564
    Abstract: A system and method in a computer system for integrating software development tools and applications into the computer system in order to build, deploy and maintain enterprise business process applications in a heterogeneous development framework. Integration of the applications and software development tools are achieved through integration of the key elements of the computer system which are business models, domain models and components. In the process of integration the origin of a first newly developed/modified/existing business model is traced to a first newly developed/modified/existing domain model and these models are linked together. Next, the constituent components of a second newly developed/modified/existing domain model are traced to a newly developed/modified/existing set of components created and linked together.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: December 26, 2000
    Assignee: Unisys Corp.
    Inventors: James Albert Fontana, Sridhar Srinivasa Iyengar, Anthony Reginald Pitchford, Norman Roy Smith, Douglas Marshall Tolbert
  • Patent number: 6158044
    Abstract: A proposal based architecture system that converts a transaction submission process into a generic object in a computer environment. A preferred embodiment of the invention provides a tool set which allows the user to create a set of Proposal Specifications which define the structure of the possible components of a Proposal. The user defines the complete characteristics (meta-data) for any kind of Proposal which define the hierarchy of domain relationships, interaction modes, validation references, and assumptions. The actual Proposal instance is formed using the definitions in the Proposal Specifications. A Proposal allows a user to add, change, and annotate data, is self aware and navigates between pages and skips to appropriate fields automatically and supports n-level undo/redo.
    Type: Grant
    Filed: May 20, 1998
    Date of Patent: December 5, 2000
    Assignee: ePropose, Inc.
    Inventor: John J. Tibbetts
  • Patent number: 6158048
    Abstract: Compilers are tools that generate efficient mappings from programs to machines. A Java "Just-In-Time" runs as part of an application, and as such, it must be fast and efficient in its use of memory. To achieve good performance and further optimize code generation, the present invention introduces a method for eliminating common subexpressions from Java bytecodes. The method of the present invention first loads a code stream containing sequences of computer code into computer memory. The expression value for a first expression of a first code sequence is computed and stored in a memory location. A tag is assigned to the memory location holding this expression value for tracking which expression sequences' values are held in memory locations. As code compilation continues, the code selector looks ahead in the code stream to see if any upcoming expression sequences already have expression values stored in a memory location.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: December 5, 2000
    Assignee: Intel Corporation
    Inventors: Guei-Yuan Lueh, Ali-Reza Adl-Tabatabai
  • Patent number: 6138272
    Abstract: A GDMO translator is provided, which is capable of generating output files with various syntaxes from an input file with the same syntax, and which is capable of describing different outputs containing, for example, an indefinite number of nesting structures.A parser 140 reads an input file and produces an abstract syntax tree by conducting an analysis according to a prescribed syntax. The abstract syntax tree is then stored in the abstract syntax tree data base 120 through the data base access means 130. The translation means 80 reads the output template 100 through the syntax reading means 60 and the lexical analysis means 70.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: October 24, 2000
    Assignee: NEC Corporation
    Inventor: Toshio Tonouchi
  • Patent number: 6117188
    Abstract: A system for controlling the distribution of software in a customized configuration to a plurality of computers in a network environment, comprising console means for creating distribution control information which is both associated with the software and related to said customized configuration, server means responsive to the console means for storing the software and the distribution control information; agent means resident on each computer for downloading the software in accordance with the distribution control information and a token authorization signal from a token server means, and token server means for controlling the number of users simultaneously distributing the software, the token server means responsive to a token request signal from the agent means to provide a token authorization signal to the agent means authorizing the agent means to download the software onto the corresponding computer.
    Type: Grant
    Filed: April 27, 1998
    Date of Patent: September 12, 2000
    Assignee: Cognet Corporation
    Inventors: David B. Aronberg, Dov J. Goldman, Peter A. Spiro
  • Patent number: 6106572
    Abstract: A method of debugging a software program in one embodiment includes the step of identifying a series of program blocks constituting at least a part of the program. With respect to each block, the method includes defining and associating an entry debug page for an entry point for the block. Each entry debug page provides a structure (i) for data that are sufficient to permit the associated block to execute and (ii) for displaying at least some of such data. The method of this embodiment also includes permitting the program to run through a desired series of program blocks and displaying at least one of the entry debug pages associated with the desired series of program blocks. Related apparatus embodiments and embodiments of media storing program code are also provided.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: August 22, 2000
    Assignee: Origins Software Company
    Inventor: Mordechai Halpern
  • Patent number: 6102966
    Abstract: A method for renaming identifiers in a Java.TM. program. In one embodiment, new names are assigned to Java classes, fields and methods within the given constraints inherent within a Java system. In one embodiment, a minimum number of different new names are assigned to the identifiers to achieve an optimal renaming. In one embodiment, a class inheritance hierarchy and method lists are used to identify naming dependencies. In one embodiment, new method names are then proposed and assigned systematically by starting at a given location in an ordered list of new names and then traversing the ordered list until an acceptable new name is identified in view of the naming dependencies. In one embodiment, naming redundancy is introduced. In one embodiment, the new names are shorter than the original names such that less storage space is required for the Java class files. In another embodiment, the new names are non-descriptive such that the program with renamed identifiers is obfuscated.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: August 15, 2000
    Assignee: PreEmptive Solutions, Inc.
    Inventor: Paul M. Tyma
  • Patent number: 6101524
    Abstract: A multithreaded program includes sequences of events wherein each sequence is associated with one of a plurality of execution threads. In a record mode, the software tool of the present invention records a run-time representation of the program by distinguishing critical events from non-critical events of the program and identifying the execution order of such critical events. Groups of critical events are generated wherein, for each group G.sub.i, critical events belonging to the group G.sub.i belong to a common execution thread, critical events belonging to the group G.sub.i are consecutive, and only non-critical events occur between any two consecutive critical events in the group G.sub.i. In addition, the groups are ordered and no two adjacent groups include critical events that belong to a common execution thread. For each execution thread, a logical thread schedule is generated that identifies a sequence of said groups associated with the execution thread.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: August 8, 2000
    Assignee: International Business Machines Corporation
    Inventors: Jong-Deok Choi, Harini Srinivasan
  • Patent number: 6096095
    Abstract: The structure of a complex data object such as a multimedia presentation is stored in a persistent representation comprising a directly executable program. The instructions of the program are created by translating recorded method calls on a function library when the object is created. The structure of the object is recreated during playback by executing the program instructions in a stack-based virtual machine in a user's computer. The persistent representation thus stores the structure as a series of operations for building the object, rather than as a static plan of the structure itself.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: August 1, 2000
    Assignee: Microsoft Corporation
    Inventor: Mark A. B. Halstead
  • Patent number: 6080207
    Abstract: A computerized system and a method for generating a custom software configuration for a hard drive of a computer system according to desired software configuration defined by a purchasing customer. The computerized system and method utilizes an image builder for creating a disk image of the desired software configuration and transferring the image to a storage device. The storage device is connected to an image server that transfers the disk image directly to the hard drive during a manufacturing and assembly process of the computer system. Once the computer system is assembled, the image server broadcasts the disk image to the computer system via a wired or wireless connection.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: June 27, 2000
    Assignee: Gateway 2000, Inc.
    Inventors: James L. Kroening, Darrin J. Fangman, James J. Marshall, Richard Peasley
  • Patent number: 6075935
    Abstract: A method for generating an application specific integrated circuit including providing a software configurable semiconductor integrated circuit having a fixed hardware architecture that includes a plurality of task engines. A high-level language compiler is provided that compiles a user created high-level language program that defines the application specific integrated circuit. The compiler parses the program into a plurality of microtasks for instructing the plurality of task engines to implement the application specific integrated circuit.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: June 13, 2000
    Assignee: Improv Systems, Inc.
    Inventors: Cary Ussery, Oz Levia, Raymond Ryan