Abstract: In order to suppress peeling of a film formed on a base, and improve the durability and reliability of the film, an overhang is provided on a side surface of a sacrifice layer, whereby a film is formed, which has an edge portion having a thickness distribution, in which a thickness is gradually decreased to substantially zero at an edge of a formed film.

Abstract: An active plate (2) for an active matrix display device (16), the active plate (2) comprising a substrate (4), a pixel area (6) and an adjacent drive circuit area (8). Both areas include polycrystalline silicon material formed by a process in which a metal is used to enhance the crystallization process (MIC poly-Si), but only the MIC poly-Si in the drive circuit area (8) is subjected to an irradiation process using an energy beam (10). TFTs are fabricated with MIC poly-Si which have leakage currents in the off state sufficiently low for them to be acceptable for use as switching elements in the pixel area of matrix display devices. As only the drive circuit area (8) need be irradiated to provide poly-Si having the desired mobility, the time taken by the irradiation process can be significantly reduced.

Abstract: An inorganic nanocomposite is prepared by obtaining a solution of a soluble hydrazine-based metal chalcogenide precursor; dispersing a nanoentity in the precursor solution; applying a solution of the precursor containing the nanoentity onto a substrate to produce a film of the precursor containing the nanoentity; and annealing the film of the precursor containing the nanoentity to produce the metal chalcogenide nanocomposite film comprising at least one metal chalcogenide and at least one molecularly-intermixed nanoentity on the substrate. The process can be used to prepare field-effect transistors and photovoltaic devices.

Abstract: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the sane kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.

Abstract: Phase change Random Access Memory (PRAM) devices include a substrate and a phase change layer pattern on the substrate. The phase change layer pattern includes a sharp tip and at least one wall that extends from the sharp tip in a direction away from the substrate. At least one contact hole node is provided that contacts the phase change material pattern adjacent the sharp tip.

Abstract: In the course of forming a resistor in the back end of an integrated circuit, an intermediate dielectric layer is deposited and a trench etched through it and into a lower dielectric layer by a controllable amount, so that the top of a resistor layer deposited in the trench is close in height to the top of the lower dielectric layer; the trench is filled and the resistor layer outside the trench is removed, after which a second dielectric layer is deposited. Vias passing through the second dielectric layer to contact the resistor then have the same depth as vias contacting metal interconnects in the lower dielectric layer. A tri-layer resistor structure is employed in which the resistive film is sandwiched between two protective layers that block diffusion between the resistor and BEOL ILD layers.

Abstract: There is provided a method for manufacturing the semiconductor device for obtaining capacitance characteristics of a larger capacitance and delay characteristics with higher efficiency. An embodiment according to the present invention employs the configuration of forming the gate polysilicon layer by conducting the customization by using the customized reticle. For example, gate polysilicon layer having a larger dimension such as gate length and the like is formed by using the dedicated gate reticle, only for an user who requests the countermeasure for the EMI noise. Having such process, a larger-scale capacitance can be provided without increasing the process cost.

Abstract: A semiconductor laser device comprises a laminate consisting of a semiconductor layer of first conductivity type, an active layer and a semiconductor layer of second conductivity type, which is different from the first conductivity type, that are stacked in order, with a waveguide region being formed to guide a light beam in a direction perpendicular to the direction of width by restricting the light from spreading in the direction of width in the active layer and in the proximity thereof, wherein the waveguide region has a first waveguide region and a second waveguide region, the first waveguide region is a region where light is confined within the limited active layer by means of a difference in the refractive index between the active layer and the regions on both sides of the active layer by limiting the width of the active layer, and the second waveguide region is a region where the light is confined therein by providing effective difference in refractive index in the active layer.

Abstract: Process for preparing a photovoltaic device including at least one semiconductive metal oxide with a major amount of a nanosized photo-catalytic crystalline phase, by depositing the oxide in the presence of a hydrosoluble organic polymer and a hydrolysable organic derivative of metal of the metal oxide under non-destructive conditions.

Abstract: A data holding control signal for each data line is supplied to a plurality of source followers that are connected together in parallel. The parallel-connected source followers are a combination of at least one first follower that is illuminated with laser light only once and at least one second follower that is illuminated twice. A width of the laser light illumination for crystallization is equal to a pitch of the source followers multiplied by an integer that is not less than 3.

Abstract: A semiconductor-on-insulator structure including first and second layers which are attached to one another either directly or through one or more intermediate layers. The first layer includes a substantially single crystal germanium semiconductor material while the second layer comprises a glass or a glass-ceramic material having a linear coefficient thermal of expansion (25-300° C.) which is within the range of +/?20×10?7/° C. of the linear coefficient thermal of expansion of the germanium first layer.

Abstract: Provided is a method for producing a semiconductor chip, comprising applying a photothermal conversion layer on a light-transmitting support, provided that upon irradiation of radiation energy, the photothermal conversion layer converts the radiation energy into heat and decomposes due to the heat; laminating the semiconductor wafer and the light-transmitting support through a photocurable adhesive by placing the circuit face and the photothermal conversion layer to face each other, thereby forming a laminated body having a non-circuit face on the outside; grinding the non-circuit face of the semiconductor wafer until the semiconductor wafer reaches a desired thickness; dicing the ground semiconductor wafer from the non-circuit face side to cut it into a plurality of semiconductor chips; irradiating radiation energy from the light-transmitting support side to decompose the photothermal conversion layer, thereby causing separation into a semiconductor chips having the adhesive layer and a light-transmitting su

Abstract: Disclosed is a method for annealing a silicon thin film in a substrate in which an insulation layer and the silicon thin film are subsequently formed. The method includes heating or preheating the silicon thin film within a temperature range at which the substrate is not transformed during the process so as to generate an intrinsic carrier therein, thereby lowering a resistance to a value at which Joule heating is possible; and applying an electric field to the preheated silicon thin film so as to induce Joule heating by means of movement of the carrier, thereby conducting crystallization, eliminating crystal defects, and ensuring crystal growth. When using the method, Joule heating is selectively induced to a-Si thin film, a-Si/Poly-Si thin film or a Poly-Si thin film according to the preheating condition, thereby making a Poly-Si thin film of good quality within a very short time without damaging the substrate.

Abstract: A method for reducing roughness of an exposed surface of an insulator layer on a substrate, by depositing an insulator layer on a substrate wherein the insulator layer includes an exposed rough surface opposite the substrate; treating the first substrate to form a zone of weakness beneath the insulator layer; and smoothing the exposed rough surface of the insulator layer by exposure to a gas plasma in a chamber. The chamber contains therein a gas at a pressure of greater than 0.25 Pa but less than 30 Pa, and the gas plasma is created using a radio frequency generator applying to the insulator layer a power density greater than 0.6 W/cm2 but less than 10 W/cm2 for at least 10 seconds to less than 200 seconds. Substrate bonding and layer transfer may be carried out subsequently to transfer the thin layer of substrate to the insulator layer and to a second substrate.

Abstract: A substrate bonding system has a first and a second substrate table for holding a first substrate and a second substrate, respectively, and a controller. The first substrate includes a first device having first contact pads and the second substrate a second device having second contact pads. The wafer bonding system is arranged to bond the first and second device in such a way that a circuit may be formed by the first and second device. The first and second substrate tables each include a position sensor arranged to measure an optical signal generated on an alignment marker of the first and second substrate, respectively. The first and second substrate tables include a first and second actuator respectively that is arranged to alter a position and orientation of the respective substrate table.

Abstract: In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material.

Abstract: An organic thin film transistor and a method for fabricating the same are disclosed. The method for fabricating the organic thin film transistor includes forming a gate electrode on a substrate. A gate insulating layer is formed on an entire surface of the substrate including the gate electrode, and source and drain electrodes are formed at a predetermined interval from each other on the gate insulating layer. An organic semiconductor layer is formed on the entire surface of the substrate and a first protection layer is formed on the organic semiconductor layer. The first protection layer is patterned and the organic semiconductor layer etched using the remaining first protection layer as a mask. A second protection layer is then formed on the entire surface of the substrate.

Abstract: Disclosed are PEALD (plasma-enhanced atomic layer deposition) apparatus and PEALD method for manufacturing a semiconductor device, the PEALD apparatus comprising: a housing including a reaction chamber in which a deposition reaction is performed; a rotary disk unit installed in the housing and provided with a plurality of susceptors for receiving wafers thereon so as to move the wafers; a gas spray unit mounted on the upper end of the housing above the rotary disk unit, and provided with first reactive gas sprayers, second reactive gas sprayers and inert gas sprayers on a lower surface of a circular disk for spraying respective gases into the housing; a gas feed unit connected to the gas spray unit for supplying first and second reactive gases and a purge gas into the housing; a gas exhaust port formed around the rotary disk unit; and a plasma generator for generating plasma to excite the second reactive gas.

Abstract: A method of fabricating a transistor device includes forming a non-crystalline germanium layer on a seed layer. The non-crystalline germanium layer is selectively locally heated to about a melting point thereof to form a single-crystalline germanium layer on the seed layer. The non-crystalline germanium layer may be selectively locally heated, for example, by applying a laser to a portion of the non-crystalline germanium layer. Related devices are also discussed.

Abstract: Nitride optoelectronic devices that have asymmetric double-sided structures and methods fabricating such structures are disclosed. Two n-type III-N layers are formed simultaneously over opposite sides of a substrate with substantially the same composition. Thereafter, a p-type III-N active layer is formed over one of the n-type III-N layers but not over the other.