Patents Examined by Kevin H Sprenger
  • Patent number: 10020742
    Abstract: A controller for use in a two-stage power supply is coupled to control switching of a switching element to regulate a transfer of energy from an input to an output of a flyback converter. The controller activates a boost switching element during a first interval in each line half cycle of an input voltage to boost an output voltage at an output of a boost-bypass converter. The controller deactivates the boost switching element during a second interval in each line half cycle such that the output voltage of the boost-bypass converter drops towards the input voltage during the second interval while the output voltage of the boost-bypass converter is greater than the input voltage. The controller controls the output voltage to follow the input voltage during a third interval of each line half cycle while the boost switching element remains deactivated and the input and output voltages are substantially equal.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: July 10, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Antonius Jacobus Johannes Werner, Matthew David Waterson
  • Patent number: 10020739
    Abstract: An integrated current replicator includes a first current sense resistor configured to sense a first input current to a power converter during a primary portion of a duty cycle and a first transconductance amplifier configured produce a first voltage at a common circuit node proportional to the first input current during the primary portion of the duty cycle. The integrated current replicator includes a second current sense resistor configured to sense a second input current to the power converter during a complementary portion of the duty cycle and a second transconductance amplifier configured produce a second voltage at the common circuit node proportional to the second input current during the complementary portion of the duty cycle. The integrated current replicator includes an amplifier configured to produce a voltage replicating the first input current and the second input current from the first voltage and the second voltage.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: July 10, 2018
    Assignee: Altera Corporation
    Inventors: Douglas Dean Lopata, Jeffrey Demski, Jay Norton, Miguel Rojas-Gonzalez
  • Patent number: 10014766
    Abstract: A power converter, configured to convert AC mains power to a DC output voltage which is lower than the AC mains' peak voltage, is disclosed. It comprises: a capacitor configured to store charge at a voltage range which is intermediate the peak voltage and the DC output voltage; a gated rectification stage comprising a rectifier for rectifying an AC mains power, and at least one switch configured to supply the rectified AC mains power to the capacitor during only a low-voltage part of a half-cycle of the AC mains; and a switched mode DC-DC power conversion stage comprising at least one further switch and configured to convert power from the capacitor to the DC output voltage during only a high-voltage part of the half-cycle. A controller for use in such a converter, and a corresponding method, are also disclosed.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: July 3, 2018
    Assignee: NXP B.V.
    Inventor: Henricus Cornelis Johannes Büthker
  • Patent number: 10007287
    Abstract: A voltage generation circuit may include: a current providing block configured to provide, to an output node, a current corresponding to a voltage level of a set voltage, and a voltage level control block configured to adjust the resistance value thereof in response to a voltage control signal, wherein the voltage level control block is coupled between the output node and a ground terminal, and wherein the voltage level control block comprises a first current path unit and a second current path unit having different temperature characteristics.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: June 26, 2018
    Assignee: SK hynix Inc.
    Inventor: Hyun Chul Lee
  • Patent number: 10002703
    Abstract: An embedded transformer device includes first, second, and auxiliary windings, defined in an insulating substrate by conductive vias joined together by conductive traces. The positions of the conductive vias are arranged to optimize the isolation properties of the transformer, while the conductive traces are arranged to optimize the coupling between the primary and secondary side windings. The embedded transformer device provides favourable isolation and energy transfer between input side and output side windings, in a device with a small component size.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: June 19, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Jing Wang, Lee Francis, Quinn Kneller
  • Patent number: 9991803
    Abstract: A method for reducing electromagnetic interference in a flyback converter includes activating a first switch to generate a primary current therein. The first switch is deactivated to generate a secondary current from a magnetic flux generated by the primary current. The magnetic flux is removed by the generation of the secondary current. A second switch is activated with a first voltage pulse to limit an excess voltage across the first switch. The excess voltage is generated in response to the deactivation of the first switch. A second switch is activated with a second voltage pulse to limit a voltage oscillation across the first switch. The voltage oscillation occurs after the removal of the magnetic flux. A first pulse width of the first voltage pulse is increased by a first jitter delay. A second pulse width of the second voltage pulse is increased by a second jitter delay.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: June 5, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Zhao-Jun Wang, Dibyendu Rana
  • Patent number: 9977455
    Abstract: A configurable impedance circuit includes a controller that senses a rectified voltage and generates a first and second control signals based on a comparison of the rectified voltage to at least one threshold voltage. The configurable impedance circuit also includes a filter for filtering the rectified voltage that couples a plurality of capacitors in series to the rectified voltage in a first configuration based on the first control signal and couples the plurality of capacitors in parallel to the rectified voltage in a second configuration based on the second control signal.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: May 22, 2018
    Assignee: Futurewei Technologies, Inc.
    Inventors: Heping Dai, Liming Ye, Dianbo Fu
  • Patent number: 9966855
    Abstract: A switching converter having a high-side switching transistor and a low-side switching transistor and an inductor, having a circuit for generating a simulated waveform representing a sawtooth inductor current waveform. A circuit for monitoring and voltage at a switch node between the high-side and low-side transistors to determine a time during which the inductor current is increasing and a time during which the inductor current is decreasing wherein voltage across the low-side transistor when it is conducting represents a first portion of the simulated sawtooth inductor current waveform. A circuit for utilizing the time when the inductor current is increasing, the time when the inductor current is decreasing and the voltage across the low-side transistor when it is conducting to generate a portion of the simulated inductor current waveform when the high-side transistor is conducting. A method and a power supply utilizing this circuit are also disclosed.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: May 8, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Scott E. Ragona, Rengang Chen, David Jauregui
  • Patent number: 9954455
    Abstract: The present invention discloses a constant on-time isolated converter comprising a transformer with a primary side and a secondary side. The primary side is connected to an electronic switch and secondary-side is connected to a load and a processor. The processor is connected to a driver on primary side through at least one coupling element and to the electronic switch. The processor receives an output voltage or an output current across the load generating a control signal accordingly. The driver receives the control signal through the coupling element and accordingly changes the ON/OFF state of the electronic switch, regulating the output voltage and the output current via the transformer, where the duration of the ON/OFF state of the electronic switch is determined between the moment control signal changes from negative to positive and the moment it changes from positive to negative to achieve a high-speed load transient response.
    Type: Grant
    Filed: December 7, 2014
    Date of Patent: April 24, 2018
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
    Inventors: Tien-Chi Lin, Chih-Yuan Liu, Yueh-Ping Yu, Jung-Pei Cheng, Pei-Lun Huang
  • Patent number: 9948185
    Abstract: A circuit configured for improving the large signal response of a control stage circuit of a switch mode DC/DC power converter by increasing the differential input range of an error amplifier by segmenting and adding an offset to the error amplifier input and output. When a transient is detected, the feedback voltage is offset in multiple segments by multiple offset voltage sources to prevent saturation of the control stage circuit. Counteracting offset voltages are added to an output of an error amplifier to prevent overshoot or undershoot. A feed-forward compensation signal is generated with the amplitude of the signal being clamped to fixed voltage levels between a minimum and a maximum amplitude of the feed-forward compensation signal. The feed-forward compensation signal is added to the output of the error amplifier to produce an output error signal of the control stage circuit configured for controlling the modulating of the switch mode DC/DC power converter.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: April 17, 2018
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Naoyuki Unno
  • Patent number: 9929633
    Abstract: An electrical apparatus comprises a chain-link converter which includes a plurality of chain-link sub-modules each of which is operable to provide a voltage source. The electrical apparatus also includes a switching control unit to control the chain-link sub-modules. The switching control unit is operatively interconnected with each chain-link sub-module by an electromagnetic radiation conduit. The length of the electromagnetic radiation conduit between the switching control unit and at least one chain-link sub-module differs from the length of the electromagnetic radiation conduit between the switching control unit and at least one other chain-link sub-module. The switching control unit is configured to discern a difference in the time taken for an electromagnetic signal to propagate through each different-length electromagnetic radiation conduit to thereby identify the or each chain-link sub-module associated with each different-length electromagnetic radiation conduit.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: March 27, 2018
    Assignee: General Electric Technology GmbH
    Inventors: Philip Robin Couch, Timothy James Stott
  • Patent number: 9921595
    Abstract: A circuit includes a PMOS transistor having a source coupled to an input node and a drain coupled to an output node, a control circuit operating with a voltage of an internal line to control a gate voltage of the PMOS transistor, a comparator operating with the voltage of the internal line to cause a comparator output to change from a first state to a second state in response to a drop of voltage of the input node, a switch circuit configured to connect the input node to the internal line when the comparator output is in the first state, and to connect the output node to the internal line when the comparator output is in the second state, and a block circuit configured to block a path from the output node to the input node through the PMOS transistor when the comparator output is in the second state.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: March 20, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Hiroyuki Nakamoto
  • Patent number: 9923462
    Abstract: A DC-DC converter includes: a switching circuit to change a voltage value of an input voltage, and to generate an output voltage; a feedback circuit connected between an output terminal to which the output voltage is supplied and a source of a first power, and to generate a feedback voltage corresponding to the output voltage; a gate pulse generator to generate a gate pulse to be supplied to the switching circuit by utilizing the feedback voltage; a current protector to control the switching circuit by utilizing the feedback voltage and the gate pulse; and a voltage protector to control the switching circuit by utilizing the feedback voltage.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: March 20, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyun Ho Kim, Min Ho Park, Yoon Sik Park
  • Patent number: 9899913
    Abstract: A dual-mode switching D.C.-to-D.C. converter includes a power conversion unit and a switch driver. The power conversion unit generates a D.C. output voltage based on a switch driving signal and a D.C. input voltage. The switch driver performs frequency compensation on the D.C. output voltage to generate a feedback voltage, and compares the feedback voltage with a comparison input signal to generate a pulse-width-modulated signal. The switch driver compares the D.C. output voltage with a first reference voltage to generate a comparison output signal. The switch driver generates the switch driving signal based on the pulse-width-modulated signal in a normal operation mode, and generates the switch driving signal based on the comparison output signal in an abnormal operation mode. The normal operation mode and the abnormal operation mode are based on a load current flowing through a load connected to the switching D.C.-to-D.C. converter.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: February 20, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ji-Soo Chang
  • Patent number: 9866122
    Abstract: A boost-bypass converter includes a boost inductor coupled between an input and an output of the boost-bypass converter. A bypass diode is coupled between the input the output of the boost-bypass converter. A boost switching element is coupled to the boost inductor, and is coupled to be activated during a first interval in each line half cycle of an input voltage to boost an output voltage at the output of the boost-bypass converter. The boost switching element is coupled to be deactivated during a second interval in said each line half cycle such that the output voltage drops towards the input voltage. The output voltage is coupled to follow the input voltage during a third interval in said each line half cycle of the input voltage. Energy is transferred between the input and the output of the boost-bypass converter through the bypass diode during the third interval.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: January 9, 2018
    Assignee: Power Integrations, Inc.
    Inventors: Antonius Jacobus Johannes Werner, Matthew David Waterson
  • Patent number: 9853547
    Abstract: An example apparatus includes a first switch having a control terminal, coupled to a voltage source and coupled to a switch node; a second switch having a control terminal, coupled to the switch node and to a voltage reference; a first inductor coupled to the switch node and to a load; a third switch having a control terminal, coupled to the voltage source and to an auxiliary node; a fourth switch having a control terminal, coupled to the auxiliary node and to the voltage reference; a second inductor coupled to the switch node and the auxiliary node; a fifth switch having a control terminal, coupled to the switch node and to the auxiliary node; and timing circuitry configured to output signals to the control terminals of the first switch, the second switch, the third switch, the fourth switch and the fifth switch to supply current to the load.
    Type: Grant
    Filed: December 31, 2016
    Date of Patent: December 26, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Saurav Bandyopadhyay, Thomas Matthew LaBella
  • Patent number: 9836070
    Abstract: The regulator with a low dropout voltage comprises an error amplifier comprising a differential pair of input transistors and a circuit with folded cascode structure connected to the output of the said differential pair, an output stage connected to the output node of the error amplifier, and a Miller compensation capacitor connected between the output stage and the cascode node on the output side (XP) of the cascode circuit; the error amplifier furthermore comprises at least one inverting amplifier module in a feedback loop between the said cascode node and the gate of the cascode transistor of the cascode circuit connected between the said cascode node and the said output node.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: December 5, 2017
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Patent number: 9819280
    Abstract: An inverter device applies an excitation current to an excitation winding of a step-up transformer through a switching element, and outputs an output voltage with an alternating-current half-wave waveform from an output winding of the step-up transformer. The inverter device includes: an input-voltage detecting unit that detects a state of the input voltage, as a voltage; a current detecting unit that converts a current flowing through the switching element into a voltage to detects the current; and a comparing unit that compares a detected current value detected by the current detecting unit with a detected input voltage value detected by the input-voltage detecting unit, and detects a high-current period in which the detected current value exceeds the detected input voltage value. Based on information indicating the high-current period detected by the comparing unit, the control circuit adjusts a period in which the switching element is turned on.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: November 14, 2017
    Assignee: Ricoh Company, Ltd.
    Inventors: Hisahiro Kamata, Yoshiyuki Shishido, Masakazu Fujita
  • Patent number: 9804621
    Abstract: A system and method are provided for generating non-overlapping enable signals. A peak voltage level is measured at an output of a current source that is configured to provide current to a voltage control mechanism. The non-overlapping enable signals are generated for the voltage control mechanism based on the peak voltage level. A system includes the current source, a downstream controller, and the voltage control mechanism that is coupled to the load. The current source is configured to provide current to the voltage control mechanism. The controller is configured to measure the peak voltage level at the output of the current source and generate the non-overlapping enable signals based on the peak voltage level. The non-overlapping enable signals provide a portion of the current to the load.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: October 31, 2017
    Assignee: NVIDIA Corporation
    Inventor: William J. Dally
  • Patent number: 9787206
    Abstract: A flyback converter is described that includes a synchronous rectification integrated circuit (SRIC). The SRIC is configured to determine an actual turn-on time associated with a secondary switching element during an initial switching cycle and determine an error time that defines approximately a difference between the actual turn-on time and a predicted turn-on time associated with the secondary switching element. The predicted turn-on time defines approximately an amount of time to delay switching-off the secondary switching element after initially switching-on the secondary switching element, during an initial switching cycle of the secondary switching element. During a subsequent switching cycle of the secondary switching element, the SRIC is further configured to delay switching-off the secondary switching element for a period of time approximately equal to the predicted turn-on time and the error time.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: October 10, 2017
    Assignee: Infineon Technologies Austria AG
    Inventor: Xiaowu Gong